Expandable Memory Array Column Control
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Solution Overview
Problem
Conventional memory designs face inefficiencies due to the need for multiple variations to accommodate different data block widths and metadata usages, leading to resource-intensive development and increased power consumption from unused bit cell columns.
Innovation Solution
A memory device with an array of bit cells arranged in rows and columns, featuring a default subset and expandable subsets, where unused expansion columns are maintained in a static state to reduce power consumption by disabling precharging, sense amplifiers, and write drivers when not in use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple memory design variations are provided to accommodate different data widths and metadata capabilities, then adaptability is improved, but device complexity and development resources increase
Solution Approach 1:
The patent implements a universal memory design where a single memory array structure can serve multiple configurations through programmable control. The memory device supports different data widths (e.g., 96-bit, 128-bit) and metadata options (ECC, parity, status bits) using the same physical array, controlled by configuration registers that enable or disable specific bit cell columns. This eliminates the need for multiple separate memory designs while maintaining full adaptability to different system requirements.
2Adaptability or versatility
If masks are used to mask off unused bit cell columns, then adaptability is improved, but power consumption increases because masked bit cells remain active
Solution Approach 1:
The patent implements dynamic control of bit cell column activation through configuration registers. Instead of static masking, the system dynamically enables or disables specific columns based on the required data width and metadata configuration. When a column is disabled, its associated access components (precharge circuits, sense amplifiers, write drivers) are also disabled, preventing dynamic power consumption. This allows the memory to adapt its active column set according to the specific implementation needs, significantly reducing power usage for unused capacity.
3Adaptability or versatility
If the maximum number of bit cell columns are included to support the largest data block, then adaptability is improved, but power consumption increases due to unused columns remaining active
Solution Approach 1:
The patent applies local quality control by enabling or disabling specific regions (columns) of the memory array based on actual usage requirements. Rather than uniformly activating all columns, the system selectively activates only the necessary columns for the current configuration (e.g., enabling columns 0-95 for a 96-bit data block, disabling columns 96-127). Each column's activation state is independently controlled, allowing precise power management where only locally required resources consume energy.
Data Source
AI summary
A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive to an expansion mode signal having a first state, the method further includes dynamically operating each column of a plurality of columns of the array to access each bit cell of a corresponding row within the plurality of columns during the access operation. Alternatively, responsive to the expansion mode state signal having a second state different than the first state, the method includes dynamically operating each column of a first subset of columns of the plurality of columns to access each bit cell of a corresponding row within the first subset of columns during the access operation, and maintaining each column of a second subset of columns of the plurality of columns in a static state during the access operation.