Expandable Memory Socket Virtual Mapping for SoC Capacity

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Solution Overview

Problem

Portable computing devices face challenges in expanding DRAM capacity cost-effectively to meet increasing demands for memory while maintaining profit margins, as traditional methods are complex and costly to implement.

Innovation Solution

The system detects a memory card in an expandable socket and configures an expanded virtual memory map, relocating peripheral images and utilizing the memory card as a block device for swap operations, effectively increasing system memory without requiring significant hardware changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If DRAM capacity is increased to meet growing memory demands, then memory performance is improved, but manufacturing cost increases and profit margins are reduced

Engineering Contradiction:
Improvememory capacityVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent combines the system's internal DRAM with an external memory card to create a unified virtual memory space. The memory management unit merges the first virtual memory space (internal DRAM) and second virtual memory space (external memory card) into a single expanded address space, allowing the system to leverage both memory resources simultaneously. This merging enables cost-effective memory expansion without requiring a complete DRAM upgrade.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The external memory card, traditionally used for storage, is made multi-functional by enabling it to serve as both storage memory and expandable DRAM through the virtual memory mapping system. The memory management unit allows the processor to access the external memory card as if it were internal DRAM, giving the device flexibility to use the same hardware component for multiple purposes depending on system needs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If external memory is integrated into the system, then memory capacity is expanded, but system complexity increases

Engineering Contradiction:
Improvememory capacityVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory management unit acts as an intermediary between the processor and the external memory card, handling all the complexity of virtual memory mapping, address translation, and memory management. This intermediary layer shields the rest of the system from the complexities of managing multiple memory types, as the processor interacts with a unified virtual memory space without needing to understand the underlying physical memory architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system creates a virtual copy of the external memory card's address space within the processor's addressable memory map. By mapping the external memory card into the virtual memory space at specific address ranges, the system allows the processor to access external memory using the same addressing mechanisms it uses for internal DRAM, effectively copying the interface behavior without duplicating the physical memory hardware.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP3183661B1Systems and methods for expanding memory for a system on chip
Publication Date: 2019.10.23 QUALCOMM INC
  • EP3183661B1 patent drawingFigure 1
  • EP3183661B1 patent drawingFigure 2
  • EP3183661B1 patent drawingFigure 3

AI summary

Systems and methods are disclosed for expanding memory for a system on chip (SoC). A memory card is loaded in an expandable memory socket electrically and is coupled to a system on chip (SoC) via an expansion bus. The memory card comprises a first volatile memory device. In response to detecting the memory card, an expanded virtual memory map is configured. The expanded virtual memory map comprises a first virtual memory space associated the first volatile memory device and a second virtual memory space associated with a second volatile memory device electrically coupled to the SoC via a memory bus. One or more peripheral images associated with the second virtual memory space are relocated to a first portion of the first virtual memory space. A second portion of the first virtual memory space is configured as a block device for performing swap operations associated with the second virtual memory space.