Expanded L2P Mapping for Parallel SSD Data Search
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Solution Overview
Problem
Existing data search algorithms in SSDs, particularly for enterprise SSDs with volatile memory, suffer from high time complexity (O(n) or O(log n), which becomes a bottleneck when dealing with large data quantities, limiting the efficiency of hot data caching.
Innovation Solution
Implementing a uniform, expanded L2P mapping table that maps logical addresses to both volatile and non-volatile memory block identifiers, reducing search complexity to O(1) and using dedicated circuits for parallel data search requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing data search algorithms are used in SSDs, then data can be searched, but the time complexity is high (O(n) or O(log n)) which becomes a bottleneck when dealing with large data quantities
Solution Approach 1:
The patent segments the search space by organizing data into multiple memory blocks with hierarchical addressing. The L2P mapping table is divided into segments that can be independently accessed, allowing the search process to be broken down into smaller parallel operations rather than a single sequential search through all data.
Solution Approach 2:
The patent introduces a new dimension to the search problem by using a two-dimensional addressing scheme through the expanded L2P mapping table. Instead of linear searching through data, the system uses logical address to physical address translation across multiple dimensions (memory block ID, memory region ID, offset), reducing search complexity from O(n) to O(1) by direct addressing.
2Productivity
If a uniform expanded L2P mapping table is implemented to map logical addresses to both volatile and non-volatile memory, then search complexity is reduced to O(1), but device complexity increases
Solution Approach 1:
The patent applies universality by creating a unified L2P mapping table structure that serves multiple functions: mapping logical addresses to both volatile memory blocks and non-volatile memory regions, handling both hot and cold data, and providing a single interface for address translation across heterogeneous storage media. This multi-functional approach simplifies the overall system architecture despite the increased capability.
Solution Approach 2:
The expanded L2P mapping table acts as an intermediary layer between the logical address space and the physical memory structures. It mediates the complexity by providing a standardized translation mechanism that abstracts the underlying differences between volatile and non-volatile memory organizations, allowing O(1) access without exposing the complexity of the dual-memory architecture to the host system.
3Productivity
If dedicated circuits are used for parallel data search requests, then processing performance improves, but manufacturing complexity increases
Solution Approach 1:
The patent segments the parallel search functionality into multiple independent L2P search engines that can operate simultaneously. Each search engine handles specific parallel search requests independently, allowing the system to achieve high parallel processing performance through modular replication of search functionality rather than requiring a single complex parallel processing unit.
Data Source
AI summary
In certain aspects, a memory system includes a volatile memory device and a memory controller operatively coupled to the volatile memory device. The volatile memory device is configured to store a logical-to-physical (L2P) mapping table. The memory controller is configured to maintain the L2P mapping table stored in the volatile memory device, such that the L2P mapping table maps a first set of logical addresses to identifiers (IDs) of memory blocks of a cache, respectively.