Exponent-Offset Floating-Point to Fixed-Point Conversion Circuit
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Solution Overview
Problem
Existing binary logic circuits for converting floating point numbers to fixed point numbers are inefficient due to the need to subtract the exponent bias, which slows down the conversion process and increases hardware requirements.
Innovation Solution
A binary logic circuit that uses a split-path shifter or a single shifter to determine the shift amount from the exponent without subtracting the bias, allowing for efficient conversion by left- or right-shifting the mantissa based on the exponent value, and includes formatting units to align the significand with the fixed point format.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the exponent bias is subtracted to determine the shift amount, then the conversion accuracy is maintained, but the conversion time increases and hardware complexity increases
Solution Approach 1:
The patent extracts only the necessary portion of the exponent information needed for shifting, bypassing the bias subtraction step. By directly using the exponent field to control the shifter, the circuit eliminates the subtraction operation while maintaining accurate conversion, thus reducing conversion time without sacrificing precision
Solution Approach 2:
The patent performs preliminary arrangement of the exponent bits to directly represent the shift amount. By pre-configuring the exponent interpretation to map directly to shift quantities, the circuit avoids runtime subtraction operations, achieving faster conversion while preserving accuracy through careful bit-level planning
2Measurement precision
If the exponent bias is subtracted to determine the shift amount, then the conversion accuracy is maintained, but the hardware requirements increase
Solution Approach 1:
The patent removes the subtraction unit from the conversion circuit by extracting only the essential exponent information needed for shifting. This eliminates additional hardware components while maintaining conversion accuracy through direct exponent-to-shift mapping
Solution Approach 2:
The patent merges the exponent interpretation and shift control functions into a single direct mapping mechanism. By combining these functions, the circuit eliminates separate subtraction hardware and uses the exponent field directly to control the shifter, reducing hardware complexity while preserving accuracy
3Measurement precision
If a conventional conversion circuit with bias subtraction is used, then accurate conversion is achieved, but the circuit speed decreases
Solution Approach 1:
The patent extracts the critical path operation of bias subtraction from the conversion circuit, eliminating the sequential dependency it creates. By using the exponent directly to control shifting without subtraction, the circuit achieves parallel operation and faster speed while maintaining accuracy through direct exponent-to-shift mapping
Data Source
AI summary
A binary logic circuit converts a number in floating point format having an exponent E, an exponent bias B=2ew−1−1, and a significand comprising a mantissa M of mw bits into a fixed point format with an integer width of iw bits and a fractional width of fw bits. The circuit includes an offset unit configured to offset the exponent of the floating point number by an offset value equal to (iw−1−sy) to generate a shift value sv of sw bits given by sv=(B−E)+(iw−1−sy), the offset value being equal to a maximum amount by which the significand can be left-shifted before overflow occurs in the fixed point format; a right-shifter operable to receive a significand input comprising a formatted set of bits derived from the significand, the shifter being configured to right-shift the input by a number of bits equal to the value represented by k least significant bits of the shift value to generate an output result, where bitwidth[min(2ew−1−1,iw−1−sy)+min(2ew−1−2,fw)]≤k≤sw, where sy=1 for a signed floating point number and sy=0 for an unsigned floating point number.