Expose Molding for Die Stack Warpage Reduction

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Solution Overview

Problem

Conventional Chip-on-Chip-on-Substrate (CoCoS) packaging faces issues with warpage due to differing Coefficients of Thermal Expansion (CTEs) between device dies and package substrates, leading to irregular joints, bump cracks, and reliability problems, as well as underfill overflow and bleeding during the bonding process.

Innovation Solution

The implementation of expose molding, where a molding material with a high CTE similar to the package substrate is used to reduce warpage by filling the gap between the device die and the package substrate, and extending to encircle the device die, thereby facilitating better bonding and reducing the need for a metal lid to correct warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional capillary underfilling is used to fill the gap between device die and package substrate, then the gap is filled, but underfill overflow and bleeding occur causing reliability problems

Engineering Contradiction:
Improvebonding reliabilityVSAvoidunderfill overflow and bleeding
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and eliminates the harmful effects of underfill overflow and bleeding by using a different filling mechanism. Instead of relying on capillary action that causes uncontrolled spreading, the invention uses controlled dispensing or injection methods that confine the underfill material within the gap between the device die and package substrate, preventing it from climbing onto surfaces or spreading excessively.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a controlled delivery system as an intermediary between the underfill material and the gap. This intermediary mechanism (such as a syringe, valve, or controlled dispensing apparatus) regulates the flow of underfill material, ensuring it fills the gap uniformly without overflowing or bleeding onto adjacent surfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If package substrates with high CTE materials are used for easy lamination, then lamination is simplified, but warpage worsens during bonding due to CTE mismatch with silicon dies

Engineering Contradiction:
Improvelamination easeVSAvoidwarpage
Core Design Contradiction:
Ease of manufactureVSShape

Solution Approach 1:

The patent changes the physical parameters of the bonding process to compensate for CTE mismatch. This includes optimizing bonding temperature, pressure, and time parameters to minimize warpage during the bonding process. By carefully controlling these parameters, the invention enables the use of high-CTE organic substrates for easy lamination while preventing excessive warpage that would lead to irregular joints and bump cracks.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies beforehand cushioning by using underfill material with specific mechanical properties that compensate for the expected warpage. The underfill acts as a cushioning layer that absorbs and distributes the thermal stress generated during bonding, preventing the warpage from causing joint irregularities or bump cracks despite the CTE mismatch between silicon dies and organic substrates.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Shape

If metal lid with skirt portion is added to reduce warpage, then warpage is reduced, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvewarpage reductionVSAvoidpackage structure complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the need for the metal lid with skirt portion by addressing the warpage problem through other means. Instead of adding this complex structural element, the invention uses optimized bonding parameters and underfill material selection to achieve adequate warpage control, thereby simplifying the overall package structure and reducing manufacturing complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent inverts the conventional approach by not adding a metal lid to control warpage, but rather by selecting and optimizing the underfill material properties and bonding parameters to inherently control warpage. This inverted approach achieves the same warpage reduction effect without the added complexity of the metal lid structure.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces warpage, improves bonding reliability, avoids underfill-related issues, and enhances packaging throughput by eliminating underfill overflow and bleeding, while maintaining efficient heat dissipation through a thermal interface material.

Implementation Method 1

Since the underfill is dispensed through capillary, it may climb onto the top surface of the first device die

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

a molding material with a high CTE similar to the package substrate is used to reduce warpage

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 3

maintaining efficient heat dissipation through a thermal interface material

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9793242B2Packages with die stack including exposed molding underfill
Publication Date: 2017.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9793242B2 patent drawing
  • US9793242B2 patent drawing
  • US9793242B2 patent drawing

AI summary

A method includes bonding a first device die onto a top surface of a package substrate, and performing an expose molding on the first device die and the package substrate. At least a lower portion of the first device die is molded in a molding material. A top surface of the molding material is level with or higher than a top surface of the first device die. After the expose molding, a second device die is bonded onto a top surface of the first device die. The second device die is electrically coupled to the first device die through through-silicon vias in a semiconductor substrate of the first device die.