Extendable Substrate IC Package for Small Device Pitch
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Solution Overview
Problem
Conventional wafer level package processes are not suitable for small-size integrated circuit devices due to insufficient pitch space, and post-packaging methods are complex and costly.
Innovation Solution
A wafer level package structure using an extendable substrate to expand space between chips, with anti-elongation layers to control substrate elongation, forming recesses, and an insulating layer to cover devices, along with through holes and surface conductive layers for increased external connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional solder ball process is used, then pitch space can be maintained, but small-size integrated circuit devices cannot provide enough pitch space
Solution Approach 1:
The patent transitions from a 2D planar substrate to a 3D extended substrate structure. By elongating the substrate in the vertical dimension and forming conductive bumps that extend outward, the invention creates additional spatial dimensions for electrical connections, thereby increasing effective pitch space without increasing the device's planar footprint.
Solution Approach 2:
The substrate is designed with extendable characteristics, allowing it to be elongated to enlarge recesses and create additional space. This dynamic adjustment of substrate geometry enables flexible optimization of pitch space according to device requirements, resolving the contradiction between small device size and sufficient connection space.
2Area of stationary object
If post-packaging process is used to increase contact areas, then available contact areas can be increased, but process complexity and cost increase
Solution Approach 1:
The patent performs substrate elongation and recess formation before packaging the integrated circuit devices. By preparing the extended substrate structure in advance, the need for complex post-packaging processes is eliminated. The contact areas are increased through preliminary substrate modification rather than subsequent complex operations.
Solution Approach 2:
The invention combines multiple functions into the substrate structure itself: the substrate serves as both the mounting platform and the source of extended contact areas. By integrating the contact area expansion function directly into the substrate design, the patent eliminates the need for separate post-packaging processes, thereby reducing overall process complexity.
Data Source
AI summary
The present invention discloses a package structure for an integrated circuit device and method for manufacturing the same. The method includes providing a wafer with multiple integrated circuit devices; providing an extendable substrate having a first surface supporting the wafer; forming multiple anti-elongation layers on a second surface of the extendable substrate, the second surface being opposite to the first surface; forming multiple recesses in the wafer for separating the integrated circuit devices from each other; elongating the extendable substrate to enlarge the multiple recesses; and forming an insulating layer to fill the recesses and cover multiple integrated circuit devices.