Extended ECC Bit for Double Pattern Flash Memory
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Solution Overview
Problem
In flash memory systems, error correction codes (ECC) cannot be safely changed during double or multiple patterning operations without risking data loss, as re-computing ECC may require a block erase that erases data in the entire block, making reliable ECC utilization challenging for error detection and correction.
Innovation Solution
A method is introduced where an extended ECC, including an ECC and an extended bit derived from it, is used. The extended bit is set to indicate the second program operation, allowing ECC logic to be disabled during read operations, preventing incorrect error detection and correction. The ECC is computed using Hamming codes, and the extended bit is derived through logical operations to manage ECC states and enable/disable error correction accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC is re-computed during a second program operation in double patterning, then error correction capability is improved, but data in the entire block is erased due to required block erase operation
Solution Approach 1:
The ECC storage is segmented into multiple regions within the block, allowing selective updating of ECC for specific sub-areas without requiring erasure of the entire block. This enables partial ECC updates during double patterning operations while preserving data in other regions.
Solution Approach 2:
The system performs preliminary actions by storing multiple ECC versions and maintaining metadata about program operation status before actual data programming occurs. This allows the system to prepare appropriate ECC states in advance, preventing the need for block erasure during subsequent operations.
2Reliability
If ECC logic is enabled during read operations after second program operation, then error detection is improved, but incorrect error correction occurs due to invalid ECC state
Solution Approach 1:
The system implements feedback mechanisms through metadata that tracks the program operation status and ECC validity. This feedback information is read alongside the data and ECC, allowing the system to determine whether ECC logic should be enabled or disabled during read operations, preventing incorrect error correction.
Solution Approach 2:
The ECC logic enable/disable state is made dynamic rather than fixed, changing based on the program operation history and current ECC validity status. This dynamic control allows the system to adapt ECC processing behavior to match the actual data state, preventing harmful incorrect corrections.
3Reliability
If block erase is performed to update ECC safely, then ECC reliability is improved, but programming time increases due to erasure operation
Solution Approach 1:
By segmenting the block into regions with different ECC validity states, the system can update ECC for only the necessary segments without performing time-consuming block erasure operations. This selective updating maintains ECC reliability while significantly reducing programming time.
Solution Approach 2:
The system changes the operational parameters by introducing metadata tracking and conditional ECC processing modes. This allows the system to switch between different ECC management strategies based on the current operation type, avoiding unnecessary block erasures and reducing overall programming time.
Data Source
AI summary
A method of operating a memory device storing ECCs for corresponding data is provided. The method includes writing an extended ECC during a first program operation, the extended ECC including an ECC and an extended bit derived from the ECC. The method includes overwriting the extended ECC with a pre-determined state during a second program operation to indicate the second program operation. The method includes, setting the ECC to an initial ECC state before the first program operation; during the first program operation, computing the ECC, changing the ECC to the initial ECC state if the computed ECC equals the pre-determined state; and changing the extended bit to an initial value if the ECC equals the initial ECC state. The method includes reading an extended ECC including an extended bit and an ECC for corresponding data, and determining whether to enable ECC logic using the extended ECC.