Extended Memory Communication Using In-Device Operation Consolidation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory operations in computing systems are inefficient and resource-intensive due to the need for multiple function calls and data transfers, especially as data storage capacity increases, leading to increased processing time and resource consumption.

Innovation Solution

Implementing extended memory operations using a processing unit coupled between a host device and a non-volatile memory device, allowing operations to be performed with a single command and utilizing hardware accelerators to perform tasks more efficiently than central processing units, with operations specified by a single address and operand.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional memory operations are used with multiple function calls and data transfers, then data storage capacity can be increased, but processing time and resource consumption increase significantly

Engineering Contradiction:
Improvedata storage capacityVSAvoidprocessing time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent combines multiple separate memory operations (read, write, erase, verify) into a single unified operation executed by the memory device. Instead of the host device issuing separate function calls for each operation, the consolidated operation allows the memory device to perform multiple tasks atomically in one execution cycle, thereby reducing processing time while maintaining support for increased data storage capacity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a processing unit within the memory device that acts as an intermediary between the host device and the memory array. This processing unit receives a single consolidated operation command, parses it into multiple sub-operations, executes them sequentially or in parallel, and returns a single result. This intermediary architecture eliminates the need for multiple host-device communication cycles, reducing processing time while enabling support for larger storage capacities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If multiple function calls are used for memory operations, then data storage capacity can be increased, but resource consumption increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidresource consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple function calls into a single consolidated operation that is executed by the memory device's internal processing unit. This consolidation reduces the number of times the host device and memory device need to exchange data and commands, thereby reducing energy consumption associated with data transfers and function call overhead while maintaining support for increased storage capacity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables the memory device to perform multiple operations autonomously through its internal processing unit without requiring continuous host device intervention. The processing unit parses the consolidated operation, manages the execution of sub-operations, and handles verification internally, reducing the computational resources and energy required from the host device while supporting larger storage capacities.

Inventive Principle:
Principle #25Self-service

3Quantity of substance

If data transfers between host and memory device are performed frequently, then data storage capacity can be increased, but processing time increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidprocessing speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The processing unit within the memory device serves as an intermediary that consolidates multiple data transfer operations into a single exchange between the host device and memory device. By parsing and executing multiple sub-operations internally, the processing unit eliminates the need for frequent host-device data transfers, thereby maintaining high processing speed while supporting increased storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If locking or mutex operations are implemented for memory access, then data integrity can be maintained, but processing time increases

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent consolidates multiple memory operations into a single atomic execution unit that inherently maintains data integrity without requiring external locking mechanisms. The unified operation is executed completely or not at all within the memory device, eliminating the need for locking overhead while preserving data integrity. This approach maintains reliability while reducing processing time.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250266087A1Extended memory communication
Publication Date: 2025.08.21 LODESTAR LICENSING GROUP LLC
  • US20250266087A1 patent drawing
  • US20250266087A1 patent drawing
  • US20250266087A1 patent drawing

AI summary

Systems, apparatuses, and methods related to extended memory communication subsystems for performing extended memory operations are described. An example method can include receiving, at a processing unit that is coupled between a host device and a non-volatile memory device, signaling indicative of a plurality of operations to be performed on data written to or read from the non-volatile memory device. The method can further include performing, at the processing unit, at least one operation of the plurality of operations in response to the signaling. The method can further include accessing a portion of a memory array in the non-volatile memory device. The method can further include transmitting additional signaling indicative of a command to perform one or more additional operations of the plurality of operations on the data written to or read from the non-volatile memory device.