Extended Multiply Unit Without Carry Flag
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Solution Overview
Problem
Existing processor architectures require a carry flag to perform extended multiplies, which increases control and storage complexity, especially in multi-threaded processors.
Innovation Solution
A multiply unit performs a sequence of operations using only portions of stored operands, eliminating the need for a carry flag by executing multiply-add and shift operations to achieve larger multiplication results without relying on carry flags.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a carry flag is used to perform extended multiplies, then the multiplication capability is improved, but the control and storage complexity increases
Solution Approach 1:
The patent segments the multiplication operation into multiple smaller multiply operations that process portions of the operand. By dividing the large multiplication into smaller manageable chunks (e.g., multiplying high and low portions separately), the system achieves extended multiplication capability without requiring a carry flag to track between operations. Each segment operation is independent and self-contained.
Solution Approach 2:
The patent introduces a new dimension to the multiplication problem by processing operands in parallel portions (high and low parts) simultaneously rather than sequentially with carry propagation. This dimensional change allows the system to compute multiple multiplication results at once, eliminating the need for sequential carry flag management while maintaining correctness.
2Adaptability or versatility
If a carry flag is implemented for extended multiplies, then larger multiplication support is achieved, but the storage complexity increases especially in multi-threaded processors
Solution Approach 1:
The patent segments the multiplication task into independent portions that can be processed in parallel. By dividing the operand into high and low portions and processing them separately through independent multiply operations, the system eliminates the need for shared carry flag storage across threads. Each thread can perform its multiplication independently without interfering with other threads' carry states.
Solution Approach 2:
The patent extracts and removes the carry flag from the system architecture entirely. Instead of maintaining a shared carry flag resource that consumes storage and creates synchronization overhead in multi-threaded environments, the patent reformulates the multiplication to eliminate carry propagation dependencies, thereby removing the need for this storage resource completely.
3Adaptability or versatility
If a carry flag is used between multiply operations, then extended multiplication is enabled, but the control complexity increases
Solution Approach 1:
The patent segments the multiplication process into independent operations that do not depend on carry flags. By breaking down the large multiplication into smaller independent multiply operations on portions of the operand, the control logic becomes simpler - each operation can be executed independently without managing carry state transitions between operations.
Solution Approach 2:
Instead of the conventional approach of performing multiplication sequentially and using carry flags to pass results between operations, the patent inverts the approach by performing multiple multiplications in parallel on different portions of the operand. This inversion eliminates the need for carry flag management while achieving the same mathematical result.
Data Source
AI summary
Techniques are disclosed relating to performing extended multiplies without a carry flag. In one embodiment, an apparatus includes a multiply unit configured to perform multiplications of operands having a particular width. In this embodiment, the apparatus also includes multiple storage elements configured to store operands for the multiply unit. In this embodiment, each of the storage elements is configured to provide a portion of a stored operand that is less than an entirety of the stored operand in response to a control signal from the apparatus. In one embodiment, the apparatus is configured to perform a multiplication of given first and second operands having a width greater than the particular width by performing a sequence of multiply operations using the multiply unit, using portions of the stored operands and without using a carry flag between any of the sequence of multiply operations.