Extended Read Buffering for NAND Memory Charge Margin
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Solution Overview
Problem
Conventional memory technologies face challenges with read disturb (RD) issues, particularly for NAND-based memory devices with low charge levels, where charge gain through trap-assisted-tunneling degrades energy zero margins, and traditional mechanisms either fail to address other valleys or detrimentally impact memory cell endurance.
Innovation Solution
Extended read buffering is implemented by retaining data in cache blocks for a wait time based on the temperature of non-cache blocks, allowing these blocks extra bake time before read operations, which improves charge margins by reducing read disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is immediately read from non-cache blocks after copying, then read speed is improved, but charge margins degrade due to read disturb effects
Solution Approach 1:
The patent applies preliminary action by implementing a wait time mechanism that delays read operations on non-cache blocks until after cache blocks have been sufficiently baked. This preliminary waiting period allows charge redistribution to stabilize, preventing read disturb effects and maintaining charge margins while still providing timely read access through the cache blocks during the wait period.
2Productivity
If cache blocks are emptied immediately after data copying, then cache block availability is improved, but read operations may suffer from insufficient bake time
Solution Approach 1:
The system performs preliminary baking of cache blocks by retaining data in cache blocks for a specified wait time after copying to non-cache blocks. This preliminary action ensures sufficient charge redistribution occurs before the cache blocks are emptied, maintaining charge margins while eventually freeing cache blocks for new data.
Solution Approach 2:
The patent implements dynamic management of cache blocks by adjusting the wait time based on temperature conditions and selectively determining which cache blocks to empty. This dynamic approach balances cache block availability with the need for sufficient bake time, allowing the system to adapt to varying operational conditions.
3Device complexity
If traditional read mechanisms are used without extended buffering, then device complexity is reduced, but read disturb effects worsen
Solution Approach 1:
The extended read buffering mechanism performs preliminary baking by maintaining data in cache blocks for a wait period after copying to non-cache blocks. This preliminary action allows charge redistribution to occur before reads are performed on non-cache blocks, significantly reducing read disturb effects while adding only moderate complexity to the read buffering mechanism.
Data Source
AI summary
Various embodiments enable read buffering in connection with data block transfer on a memory device. For some embodiments, read buffering from a set of cache blocks is enabled during a period of wait time after data is copied (e.g., data is transferred, such as part of a compaction operation) from the set of cache blocks to a set of non-cache blocks. In various embodiments, after the wait time, data stored on the set of cache blocks is erased (e.g., the set of cache blocks is released) and read buffering from the set of cache blocks is disabled.