Extended SAD Calculation Unit for Multi-Pixel Correlation
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Solution Overview
Problem
Conventional imaging devices face challenges in efficiently processing pixel signals from solid-state imaging devices that simultaneously output multiple pixel signals, requiring multiple SAD calculation units and increasing circuit complexity.
Innovation Solution
An image processing device that simultaneously finds correlations between target and reference pixels by defining extended target and reference regions, performing SAD calculations, and using subtraction processing units to refine results, thereby reducing the number of calculation circuits needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple SAD calculation units are provided to simultaneously process multiple pixel signals, then processing speed is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple SAD calculation operations into a single SAD calculation unit by merging the target blocks of multiple target pixels into an extended target block. This allows the unit to perform SAD calculations for multiple pixels simultaneously, improving processing speed while avoiding the need for multiple separate calculation units and reducing circuit complexity.
Solution Approach 2:
The SAD calculation unit is designed to perform multiple functions by calculating SAD values for multiple target pixels within a single extended target block. This multi-functional approach enables the same hardware unit to process multiple pixel signals concurrently, achieving high productivity without increasing device complexity.
2Device complexity
If the number of calculation circuits is reduced, then device complexity is lowered, but processing capability may be compromised
Solution Approach 1:
The patent segments the extended target block into multiple individual target blocks corresponding to different target pixels. The SAD calculation unit processes the extended block by calculating SAD values for each segment, enabling it to maintain high processing capability while using a single unified calculation structure rather than multiple separate circuits.
Solution Approach 2:
By merging multiple target blocks into an extended target block and processing them together in a single SAD calculation unit, the patent reduces the total number of calculation circuits needed while maintaining the ability to process multiple pixel signals simultaneously, thus lowering device complexity without sacrificing processing capability.
Data Source
AI summary
An image processing device includes an extended region sum of absolute differences (SAD) calculation unit configured to define each of an extended target region obtained by combining a plurality of predetermined target regions for each target pixel and an extended reference region obtained by combining a plurality of predetermined reference regions for each corresponding reference pixel and output an extended SAD calculation result obtained by performing SAD calculation based on values represented by pixel signals of pixels included in the extended target region and the extended reference region, and subtraction processing units equal in number to the target pixels to be simultaneously correlated and configured to correspond to the plurality of target pixels and output SAD calculation results obtained by performing subtraction processes based on the extended SAD calculation result and an SAD calculation result of a region which is not included in a target region.