Extender Combining Clock and Data Signals for Single Cable Transmission

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Solution Overview

Problem

Conventional extender configurations require two Cat.5 transmission cables to transmit Transition Minimized Differential Signaling (TMDS) signals and other signals, leading to complex circuit layouts and high costs due to the need for additional signal compensation and decoding units.

Innovation Solution

An extender system that combines positive and negative clock signals with differential data signals to form composite signals, allowing for simultaneous transmission of TMDS and other signals over a single Cat.5 cable, using impedance units and a recovery unit to extract and combine clock signals, thereby simplifying the circuit layout and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If two Cat.5 transmission cables are used to transmit TMDS signals and other signals, then all signals can be transmitted without loss, but the device complexity and cost increase due to requiring additional signal compensation and decoding units

Engineering Contradiction:
Improvesignal transmission completenessVSAvoidcircuit layout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple differential signals (TMDS data signals and clock signals) into a single composite differential signal for transmission over one Cat.5 cable. The transmitter merges the positive and negative clock signals with the data signals, and the receiver extracts and recovers them, eliminating the need for separate cable transmissions and complex compensation/decoding units while maintaining complete signal transmission.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If two Cat.5 transmission cables are used to transmit TMDS signals and other signals, then all signals can be transmitted without loss, but the cost increases due to requiring additional signal compensation and decoding units

Engineering Contradiction:
Improvesignal transmission completenessVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple differential signals (TMDS data signals and clock signals) into a single composite differential signal for transmission over one Cat.5 cable. The transmitter merges the positive and negative clock signals with the data signals, and the receiver extracts and recovers them, eliminating the need for separate cable transmissions and complex compensation/decoding units while maintaining complete signal transmission.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If four pairs of differential wires are used to transmit three differential data signals and a differential clock signal of TMDS, then TMDS signals can be transmitted, but other signals cannot be transmitted simultaneously

Engineering Contradiction:
ImproveTMDS signal transmission qualityVSAvoidsignal transmission versatility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the four pairs of differential wires into functional groups: three pairs transmit the composite TMDS signals (including embedded clock signals), while the fourth pair is freed up for transmitting other signals such as DDC, USB, audio, keyboard, and mouse signals. This segmentation enables both TMDS and other signals to coexist on the same cable without interference.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9083488B1Extender and method of recovering differential signal
Publication Date: 2015.07.14 ATEN INTERNATIONAL CO LTD
  • US9083488B1 patent drawing
  • US9083488B1 patent drawing
  • US9083488B1 patent drawing

AI summary

An extender includes a transmitter and a receiver for transmitting a first and a second differential data signals and a differential clock signal. The transmitter combines a positive clock signal of a differential clock signal with a first differential data signal and combines a negative clock signal of the differential clock signal with a second differential data signal, thereby respectively forming a first and a second composite differential signals. The receiver includes a first impedance unit extracting the positive clock signal from the first composite differential signal, a second impedance unit extracting the negative clock signal from the second composite differential signal, and a recovery unit receiving the positive and negative clock signals and forming the differential clock signal. The frequency of the extracted first and second differential data signals are ten times or more of the frequency of the differential clock signal.