External Key Table Architecture for Scalable Secure SoC Storage
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Solution Overview
Problem
Existing system-on-chip (SOC) technologies inefficiently utilize valuable resources by storing keys and key tables internally, leading to increased chip size and silicon requirements as the need for more storage increases.
Innovation Solution
Storing keys and key tables externally in a first device, with the chip controlling access and applying confidentiality and integrity protections to ensure secure and efficient use of resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If keys are stored internally in the system-on-chip, then key access is fast and secure, but chip size and silicon requirements increase
Solution Approach 1:
The patent extracts the key storage function from the system-on-chip and places it in an external non-volatile memory device. The chip retains only the cryptographic engine and control logic, while the actual key data is stored externally. This separation allows secure key management without consuming valuable on-chip silicon resources, directly resolving the contradiction between security and chip size.
Solution Approach 2:
The patent introduces an intermediary interface layer that mediates between the chip's cryptographic engine and the external memory storage. This intermediary handles the secure transmission and access control of cryptographic keys, enabling the chip to maintain security protocols while relying on external storage capacity rather than internal memory.
2Adaptability or versatility
If more keys are stored internally, then key table capacity increases, but manufacturing cost and chip complexity increase
Solution Approach 1:
The patent extracts the bulk key storage requirement from the chip manufacturing process and relocates it to external non-volatile memory. This allows the chip to be manufactured with a fixed, minimal cryptographic engine that can support any number of keys, while the key table capacity can be scaled independently by choosing different external memory configurations, thereby decoupling manufacturing complexity from key table capacity.
Solution Approach 2:
The cryptographic engine designed in this patent is universal and can operate with any number of keys stored in the external memory. The same chip architecture supports variable key table capacities without requiring different manufacturing processes, allowing a single chip design to serve multiple applications with different key management requirements.
3Speed
If internal storage is used for keys, then access speed is fast, but valuable chip resources are consumed
Solution Approach 1:
The patent introduces an intermediary interface and buffer mechanism that enables fast key access from external memory. The cryptographic engine can quickly retrieve required keys through optimized interface protocols, and the system can pre-load or cache frequently accessed keys in small on-chip buffers, maintaining fast access performance while using minimal chip resources for the critical access path.
Solution Approach 2:
The patent segments the key storage system into two parts: a small, fast on-chip buffer for immediate key access and a large external non-volatile memory for comprehensive key storage. This segmentation allows the system to maintain fast access speeds for operational keys while storing the complete key table externally, optimizing both speed and resource utilization.
Data Source
AI summary
Novel tools and techniques are provided for implementing storage of one or more keys received by a chip, and more particularly to methods, systems, and apparatuses for implementing storage of one or more keys in a storage of a first device that is external to the chip. An integrated circuit can include a circuit configured to receive at least one of a key or a request to retrieve the key and at least one of store the key in a storage of a device when the key is received or retrieve the key from the storage of the device when the request to retrieve the key is received. The first device can be external to the integrated circuit. The circuit can further be configured to control access to the key stored in the storage of the device.