External PHY to MAC Connectivity via MDIO Interface

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Solution Overview

Problem

There are difficulties in connecting external PHY devices to MAC devices, particularly due to limitations in existing approaches such as internal PHY integration and SERDES interface support, which restrict the ability to switch to more suitable PHY devices for better connections and temperature ranges.

Innovation Solution

The development of a device driver for network I/O devices, utilizing a Management Data I/O (MDIO) interface to establish full link up functionality with external PHY devices, enabling the transmission and reception of AVB packets according to IEEE 802.1 BA standards, and allowing for the use of external PHY devices without requiring SERDES support.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an internal PHY approach is used to integrate the PHY device into the MAC device, then the connection stability is improved, but the adaptability to different PHY devices and environmental conditions deteriorates

Engineering Contradiction:
Improveconnection stabilityVSAvoidability to switch to different PHY devices
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent divides the network interface functionality into separate MAC and PHY devices, allowing the MAC device to remain stable while the PHY device can be changed independently based on environmental requirements. This segmentation enables the system to maintain connection stability through the integrated MAC while gaining adaptability by selecting different external PHY devices for different temperature ranges and connection types.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a SERDES interface is used to connect external PHY devices to the MAC device, then the number of I/O pins is reduced, but the compatibility with external PHY devices deteriorates

Engineering Contradiction:
Improvenumber of I/O pinsVSAvoidsupport for external PHY devices
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a GPIO-based intermediary interface that acts as a mediator between the MAC device and external PHY devices. This GPIO interface provides universal compatibility with various PHY devices while maintaining a simple pin configuration. The GPIO pins serve as versatile intermediaries that can accommodate different PHY device types without requiring specialized SERDES connections, thus resolving the contradiction between pin reduction and device compatibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If an external PHY device is used without SERDES support, then the adaptability to different environmental conditions is improved, but the connection complexity increases

Engineering Contradiction:
Improvesupport for different temperature rangesVSAvoidconnection interface complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal GPIO-based connection interface that can work with multiple types of external PHY devices across different temperature ranges and environmental conditions. The GPIO pins are configured to handle various signal types and communication protocols, providing multi-functional capability that simplifies the connection interface while maintaining broad adaptability. This universal approach allows a single MAC device design to support diverse PHY devices without increasing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10657074B2Connecting an external PHY device to a MAC device using a management data input/output interface
Publication Date: 2020.05.19 INTEL CORP
  • US10657074B2 patent drawing
  • US10657074B2 patent drawing
  • US10657074B2 patent drawing

AI summary

Examples include connecting an external physical layer device to a media access control device by determining a mode of a communications link between the external physical layer device and the media access control device; and when the mode of the communications link is serial gigabit media independent interface (SGMII), enabling an inter-integrated circuit (I2) interface between the external physical layer device and the media access control device, and setting a destination for management data input/output (MDIO) transactions to the external physical layer device.