Extreme Case Sampling for Variation-Aware IC Design
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Solution Overview
Problem
Current integrated circuit design processes are inefficient due to the need for extensive simulations across Process, Voltage, and Temperature (PVT) variations, leading to increased computational costs and potential misinterpretation of simulation results due to changes in circuit topology, which complicates the verification of design modifications.
Innovation Solution
The method involves capturing 'Extreme Case' PVT samples and associated Monte Carlo iterations after initial simulations, allowing for reduced simulations during refinement by focusing on extreme cases, using pre-defined methods to define 'extreme' conditions, and ensuring undisrupted random number sequences for topologically modified circuits, thereby reducing the number of simulations and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If extensive simulations across full PVT space are performed, then verification accuracy is improved, but computational cost and time increase significantly
Solution Approach 1:
The PVT parameter space is segmented into three distinct types of simulation points: nominal points (center values), corner points (extreme values of PVT parameters), and random points (Monte Carlo samples). This segmentation allows the verification process to focus computational resources on critical regions while reducing overall simulation burden.
Solution Approach 2:
Corner cases are identified and simulated in advance during the initial verification phase. These pre-identified critical points are then reused in subsequent iterations when design modifications are made, eliminating the need to re-simulate the entire PVT space and significantly reducing computational time.
2Reliability
If Monte Carlo analysis with random sampling is used, then process variation coverage is improved, but result interpretability deteriorates due to topology changes
Solution Approach 1:
A mapping mechanism is introduced as an intermediary between Monte Carlo random sampling and design iteration. The mapping records the correspondence between random sample indices and PVT parameter values, allowing results to be tracked and interpreted across topology changes by referencing the same sample indices throughout the design refinement process.
3Reliability
If full PVT simulation suite is re-run after each design modification, then verification completeness is improved, but productivity decreases
Solution Approach 1:
The simulation suite is divided into preliminary corner case simulations and subsequent targeted re-verification. Corner cases are pre-identified and simulated once, then only affected subsets of simulations are re-run after design modifications, maintaining verification completeness while dramatically improving design iteration speed.
Solution Approach 2:
Instead of re-running the complete PVT simulation suite after each design modification, only the necessary partial set of simulations (affected corner cases and relevant random points) is executed. This partial action approach maintains sufficient verification completeness while reducing redundant computational effort.
Data Source
AI summary
The independent claims of this patent signify a concise description of embodiments. Roughly described, disclosed is technology for yield improvement of an integrated circuit device implementing a circuit design which includes, in a first verification, verifying adherence of the circuit design to a set of performance specifications, over a first set of test cases which include variations in a fabrication process variable or an environmental condition. The verification includes identifying, for each test case of the first set of test cases, an extent to which the circuit design satisfies one or more of the performance specifications of the set of performance specifications. A second circuit design is then developed to address corner cases identified in the first verification, and the second circuit design is then re-verified using only a subset of test cases having test cases fewer than test cases of the first set of test cases.