Hybrid Solver Extruded Via for 3D Electronic Design Analysis
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Solution Overview
Problem
Current electronic design simulation methods, particularly those using 3D solvers, face significant challenges with memory footprint and computational costs, while hybrid solvers are inadequate for modeling components outside parallel field domains.
Innovation Solution
The method involves generating an extruded via from a linkage node to a reference metal plane, re-establishing connections, and using a hybrid solver to simulate the electronic design, thereby reducing the need for 3D solvers and minimizing artificial effects by de-embedding undesirable electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If 3D solvers are used to model and analyze electromagnetic fields in electronic designs, then modeling accuracy and completeness are improved, but memory footprint and computational costs increase significantly
Solution Approach 1:
The patent segments the electronic design model into multiple fabric layers (first fabric and second fabric) that can be analyzed separately using hybrid solvers. By dividing the complex 3D structure into manageable 2.5D segments, the method maintains modeling accuracy while reducing memory requirements, as each fabric can be processed independently rather than loading the entire 3D structure into memory simultaneously.
Solution Approach 2:
The patent transitions from pure 3D modeling to a 2.5D hybrid approach by introducing fabric-specific analysis planes. The extruded via technique adds a dimensional transformation where vias are extended from 2D pad representations into 3D structures only where necessary for electrical connection, allowing hybrid solvers to handle the majority of the analysis in a more memory-efficient 2.5D space rather than requiring full 3D solver resources.
2Measurement precision
If 3D solvers are used to analyze electromagnetic fields, then comprehensive field analysis is improved, but computational time and costs become prohibitively expensive
Solution Approach 1:
The patent divides the electromagnetic field analysis into separate fabric domains that can be solved independently using hybrid solvers. By segmenting the analysis into first-fabric and second-fabric components with their respective extruded vias, the computational workload is distributed across multiple simpler calculations rather than requiring a single comprehensive 3D solver run, significantly reducing total computational time while maintaining field analysis completeness.
Solution Approach 2:
The patent creates simplified 2.5D representations (copies) of the electromagnetic field behavior within each fabric layer. Instead of performing one exhaustive 3D field analysis, the method generates multiple 2.5D field models that approximate the 3D behavior in each fabric plane, reducing computational time while preserving the essential field interaction characteristics needed for accurate electrical characteristic analysis.
3Quantity of substance
If hybrid solvers are used for analysis, then memory footprint and computational costs are reduced, but inability to model components outside parallel field domains becomes a limitation
Solution Approach 1:
The patent resolves the hybrid solver's limitation by implementing extruded vias that extend from the 2D pad layer into the 3D space vertically. This dimensional transformation allows components that would normally exist outside parallel field domains to be represented within the hybrid solver's capability by adding the vertical dimension only where needed for electrical connections, thereby extending modeling versatility while maintaining memory efficiency.
Solution Approach 2:
The extruded via acts as an intermediary element that bridges the gap between 2D pad representations and 3D electrical connections. By introducing this intermediate 3D structure, the patent enables hybrid solvers to model complex multi-fabric interconnections that would otherwise require full 3D solvers, effectively extending the hybrid solver's adaptability to handle components outside traditional parallel field domains.
4Reliability
If extruded vias and reference planes are added to the analysis model, then connectivity and electrical characteristics are improved, but artificial effects and undesirable electrical properties are introduced
Solution Approach 1:
The patent extracts and isolates the artificial effects introduced by extruded vias and reference planes through the de-embedding process. By identifying and separating these unwanted electrical characteristics from the actual device-under-test parameters, the method removes the harmful artificial effects while preserving the accurate connectivity modeling, thereby maintaining reliability without the contamination of spurious electrical properties.
Solution Approach 2:
The patent converts the harmful artificial effects into beneficial measurement corrections. The extruded vias and reference planes, while introducing unwanted electrical characteristics, also provide a structured framework for de-embedding calculations. By deliberately introducing these known artificial structures, the method creates measurable reference points that can be mathematically removed, ultimately improving the accuracy of the extracted electrical characteristics through the conversion of harm into a systematic correction process.
Data Source
AI summary
Disclosed are techniques for model-based electronic design implementation with a hybrid solver. These techniques generate an extruded via from a linkage node to a reference metal plane that is added to an analysis model for at least a portion of an electronic design. The analysis model for the at least the portion is generated at least by re-establishing interconnection between the at least the portion and a linkage circuit element with the extruded via. At least the portion of the electronic design may further be implemented using the analysis or simulation results that are generated by using the hybrid solver on the model, without using three-dimensional solvers, for a three-dimensional model of the electronic design.