Eye Opening Monitor With Phase-Shifted Sampling Margin Detection

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Solution Overview

Problem

High-speed bus interfaces in mobile electronic devices experience signal attenuation, interference, and timing drift, necessitating effective monitoring of channel conditions to ensure reliable data transfer.

Innovation Solution

An eye opening monitor with first and second sampling circuits and a processing circuit to determine the margin of an eye opening by iteratively adjusting the phase difference between phase-shifted data clock signals, enabling dynamic monitoring during normal operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred over a serial data link at high speed, then productivity is improved, but signal attenuation, interference and timing drift occur causing reliability to deteriorate

Engineering Contradiction:
Improvedata transfer speedVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing eye opening monitoring during link training before normal data transfer begins. The system characterizes the channel conditions and determines optimal sampling parameters in advance, so that when high-speed data transfer starts, the receiving circuit is already configured to compensate for anticipated signal degradation. This proactive approach ensures reliability is established before productivity demands peak performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through continuous eye opening monitoring that tracks the quality of received signals. The system measures eye opening parameters such as width and height, compares them against thresholds, and dynamically adjusts sampling timing and equalization parameters. This closed-loop feedback mechanism allows the system to maintain signal integrity even as channel conditions change during high-speed operation, resolving the contradiction between transfer speed and reliability.

Inventive Principle:
Principle #23Feedback

2Reliability

If dynamic monitoring of receiving circuits is implemented, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvechannel condition monitoringVSAvoidmonitoring circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the eye opening monitor to perform multiple functions within a single integrated structure. The monitoring circuit simultaneously characterizes channel conditions, determines eye opening parameters, generates control signals for sampling timing, and provides feedback for equalization. By consolidating these functions into one multi-functional module rather than separate circuits, the system achieves comprehensive reliability monitoring without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements self-service through automatic eye opening monitoring that operates without external intervention. The system autonomously captures data samples, analyzes eye diagram characteristics, determines optimal sampling points, and adjusts receiving circuit parameters automatically. This self-configuring capability eliminates the need for manual calibration or external testing equipment, achieving reliable dynamic monitoring while keeping the added complexity manageable through automation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12574020B2Dynamic eye opening monitor
Publication Date: 2026.03.10 QUALCOMM INC
  • US12574020B2 patent drawing
  • US12574020B2 patent drawing
  • US12574020B2 patent drawing

AI summary

A method for identifying margins in an eye opening includes capturing first data from a data signal based on edges in a data clock signal, capturing second data from the data signal responsive to edges in a phase shifted version of the data clock signal, iteratively increasing phase difference between the phase shifted version of the data clock signal and the data clock signal when the first data initially matches the second data until the first data differs from the second data, iteratively decreasing the phase difference between the phase shifted version of the data clock signal and the data clock signal when the first data initially differs from the second data until the first data matches the second data, and determining the margin of the eye opening when the first data begins to match the second data or when the first data begins to differ from the second data.