Fabric Bridge Write Acknowledgment for Memory Ordering
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Solution Overview
Problem
In computing systems with mixed posted and non-posted memory hierarchies, processors face issues with write ordering and acknowledgement delays, leading to potential errors and excessive logic/storage requirements for tracking outstanding writes.
Innovation Solution
Converting the interface between the processor and fabric bridge from a non-posting to a posting interface, where the fabric bridge acknowledges write acceptance rather than persistence, allowing for improved write throughput and introducing a checkpoint sequence using a high-speed register read to ensure write ordering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor waits for write persistence acknowledgements before issuing subsequent writes, then write ordering is maintained, but write throughput decreases and processor productivity is reduced
Solution Approach 1:
The patent segments the write acknowledgment process into two distinct types: acceptance acknowledgments (indicating the fabric bridge has received and queued the write) and persistence acknowledgments (indicating the write has been fully persisted to non-volatile storage). This segmentation allows the processor to receive rapid acceptance acknowledgments and continue issuing writes, while persistence is tracked separately for ordering purposes, thereby resolving the contradiction between maintaining write ordering and improving write throughput
Solution Approach 2:
The patent introduces a fabric bridge as an intermediary component between the processor and the non-volatile storage media. The fabric bridge accepts writes from the processor, queues them, and manages persistence to storage independently. This intermediary allows the processor to decouple from waiting for persistence acknowledgments, improving throughput while the fabric bridge ensures proper ordering is maintained through its internal queuing mechanism
2Reliability
If the processor tracks each outstanding write until persistence, then write ordering is ensured, but logic and storage requirements become prohibitively large
Solution Approach 1:
The patent extracts the complex tracking and persistence management functionality from the processor and relocates it to the fabric bridge. The fabric bridge assumes responsibility for tracking outstanding writes, managing persistence queues, and generating persistence acknowledgments. This extraction simplifies the processor's logic requirements while maintaining write ordering guarantees, as the fabric bridge handles the cumbersome tracking tasks independently
3Reliability
If the interface uses non-posting protocol, then write persistence can be confirmed, but write bandwidth is limited and system efficiency decreases
Solution Approach 1:
The patent introduces dynamic behavior to the write interface by implementing a posting protocol where the fabric bridge proactively pushes acceptance acknowledgments back to the processor as soon as writes are received and queued. This dynamic acknowledgment mechanism allows the processor to maintain a continuous stream of write operations without waiting for persistence confirmations, thereby increasing write bandwidth while still ensuring persistence through the fabric bridge's internal tracking
Data Source
AI summary
A system comprises a processor, a memory fabric, and a fabric bridge coupled to the memory fabric and the processor. The fabric bridge may receive, from the processor a first eviction request comprising first eviction data, transmit, to the processor, a message indicating the fabric bridge has accepted the first eviction request, transmit a first write comprising the first eviction data to the fabric, receive, from the processor, a second eviction request comprising second eviction data, and transmit a second write comprising the second eviction data to the fabric. Responsive to transmitting the second write request, the fabric bridge may transmit, to the processor, a message indicating the fabric bridge accepted the second eviction request, determine that the first write and the second write have persisted, and transmit, to the processor, a notification to the processor responsive to determining that the first write and the second write have persisted.