High-Speed Fabric Controller for Memory Data Tiering
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Solution Overview
Problem
Current processors expend precious resources managing data movement between high-speed memory and other data tiers, as they typically control caching and offload data through themselves, leading to inefficiencies in data access and storage.
Innovation Solution
A high-speed fabric controller and memory controller system that connects high-speed memory directly to persistent data storage, allowing data transfers between these tiers independently of the processor, thereby bypassing processor involvement in data movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor controls data movement between high-speed memory and other data tiers, then data access is maintained, but processor resources are consumed
Solution Approach 1:
The system segments data management functions by separating processor responsibilities from fabric controller responsibilities. The fabric controller is given independent authority to manage data tiering and movement between high-speed memory and persistent storage, while the processor focuses on computation. This functional segmentation eliminates the contradiction by distributing workload appropriately across system components.
Solution Approach 2:
The fabric controller acts as an intermediary between the processor and the memory/storage hierarchy. It mediates data movement operations by providing a dedicated high-speed fabric connection that bypasses the processor for data tiering operations. This intermediary enables efficient data management independent of processor involvement, resolving the resource consumption issue while maintaining data access capability.
2Speed
If data transfers between high-speed memory and persistent storage occur through the processor, then data access is enabled, but data movement efficiency decreases
Solution Approach 1:
The system extracts data movement operations from the processor's responsibility and assigns them to the fabric controller. By taking out these I/O-intensive operations from the processor, the system creates a dedicated data movement pathway through the high-speed fabric connection. This extraction enables faster data transfers between memory tiers without involving the processor, directly addressing the speed and time efficiency contradiction.
Solution Approach 2:
The invention adds a new dimension to the system architecture by introducing a separate high-speed fabric connection for data movement that operates independently from the processor's memory interface. This dimensional addition creates a parallel data transfer pathway, allowing simultaneous processor computation and efficient data tiering operations, thereby resolving the speed-time efficiency contradiction.
Data Source
AI summary
An apparatus for memory management a high-speed fabric controller and a memory controller connected between a high-speed memory and a processor. The memory controller is configured to control processor access to the high-speed memory over a memory bus between the processor and the high-speed memory. The apparatus includes a high-speed data connection between the memory controller and the high-speed fabric controller and a data connection between a tier of persistent data storage and the high-speed fabric controller. The high-speed fabric controller is configured to control data transfers between the tier of persistent data storage over and the high-speed memory independent of the processor.