Face-to-back oxide bonding for 3D memory thermal management
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Solution Overview
Problem
The performance of three-dimensional memory devices is degraded due to the incorporation of peripheral circuitry on the same die as the memory elements, and existing methods for bonding memory dies to support dies do not effectively address the thermal challenges and scalability for monolithic three-dimensional NAND string memory devices.
Innovation Solution
A method for forming a bonded die assembly using face-to-back oxide bonding, where a first semiconductor die with a silicon oxide surface is bonded to a second semiconductor die with a handle substrate, followed by thinning and detaching the handle substrate, and forming inter-die connection via structures to create a scalable and efficient assembly for three-dimensional memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If peripheral circuitry is incorporated on the same die as memory elements, then device integration is improved, but thermal management and performance are degraded
Solution Approach 1:
The invention divides the semiconductor device into separate dies: a first die containing memory elements and a second die containing peripheral circuitry. This segmentation allows each die to be optimized independently, with the memory die focused on high-density storage and the peripheral die on circuit functionality, thereby resolving the thermal management issues caused by integrating both on the same die.
Solution Approach 2:
The peripheral circuitry is extracted from the memory die and placed on a separate support die. This extraction removes the source of excessive heat generation from the memory array, improving thermal management while maintaining the functional integration through wafer-level bonding.
2Ease of manufacture
If existing bonding methods are used to bond memory dies to support dies, then assembly is achieved, but thermal challenges and scalability are not effectively addressed
Solution Approach 1:
A handle substrate is introduced as an intermediary during the bonding process. The handle substrate facilitates precise alignment and bonding between the first and second semiconductor dies while enabling subsequent thinning and detachment operations. This intermediary approach allows for controlled wafer-level bonding that addresses thermal challenges while maintaining manufacturing scalability.
Solution Approach 2:
The invention changes the bonding parameters by performing oxide-to-oxide bonding at the wafer level rather than traditional chip-level bonding. This parameter change enables larger bonding areas, better thermal distribution, and improved scalability while maintaining assembly feasibility through standardized wafer processing techniques.
3Manufacturing precision
If face-to-back oxide bonding with handle substrate is used, then bonding precision is improved, but process complexity increases
Solution Approach 1:
Silicon oxide surfaces are prepared in advance on both the first and second dies before bonding. This preliminary action of creating oxide bonding surfaces ensures precise and reliable bonding when the dies are brought together. The handle substrate is also attached preliminarily to facilitate subsequent thinning and detachment operations, improving overall bonding precision while managing process complexity through structured sequencing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of three-dimensional memory devices by separating the peripheral circuitry from the memory elements, allowing for improved thermal management and scalability in bonding multiple memory dies to support dies, thereby improving the overall efficiency and reliability of the memory device.
Implementation Method 1
bonding the second semiconductor die to the first semiconductor die by inducing oxide-to-oxide bonding between the second silicon oxide surface and the first silicon oxide surface
Data Source
AI summary
A first semiconductor die includes a first substrate, first semiconductor devices, first dielectric material layers having a first silicon oxide surface as an uppermost surface and forming first metal interconnect structures. A second semiconductor die includes a second substrate, second semiconductor devices, and second dielectric material layers forming second metal interconnect structures. A handle substrate is attached to a topmost surface of the second semiconductor die. The second substrate is thinned, and a second silicon oxide surface is provided as a bottommost surface of the second semiconductor die. The second semiconductor die is bonded to the first semiconductor die by inducing oxide-to-oxide bonding between the second silicon oxide surface and the first silicon oxide surface. The handle substrate is detached, and inter-die connection via structures are formed through the second substrate and the bonding interface to contact the first metal interconnect structures. External bonding pads may be subsequently formed.