Semiconductor Bitline Formation Using Faceted Trenches
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Solution Overview
Problem
Current semiconductor memory construction techniques face challenges in increasing integration density while maintaining performance and reducing costs, particularly in forming tightly-spaced bitlines and wordlines with effective data storage structures.
Innovation Solution
A method involving the formation of trenches with faceted upper portions within insulative material, where electrically conductive bitlines are patterned and used as a mask for self-aligned contact etches, allowing for the creation of self-aligning spacers and subsequent formation of electrically conductive columns coupled with storage node contacts, while maintaining a high-margin process for capacitor constructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form bitlines and storage structures, then manufacturing simplicity is maintained, but integration density and performance are limited
Solution Approach 1:
The method performs preliminary actions by forming faceted trenches with overhanging portions before forming the bitlines. The faceted trenches are created with specific geometric features that will later serve as self-aligned masks and spacer formation regions. This preliminary structuring enables subsequent self-aligned contact etches and spacer formation without requiring additional alignment steps, thereby increasing integration density while managing fabrication complexity.
Solution Approach 2:
The bitlines and faceted trench structures serve dual functions: they are both the final conductive interconnect structures and the self-aligned masks for forming contact openings to storage node contacts. The overhanging portions of the faceted trenches automatically form spacers during the etch process, eliminating the need for separate spacer formation steps. This self-service approach increases manufacturing precision for alignment-critical features.
2Manufacturing precision
If tightly-spaced bitlines and wordlines are formed, then integration density increases, but manufacturing precision and alignment difficulty worsen
Solution Approach 1:
The faceted trench structures are formed in advance with precise geometric control, creating overhanging portions that will serve as self-aligned masks. This preliminary action establishes the spatial relationships between bitlines and storage structures before the actual contact openings are etched, ensuring high alignment precision even as integration density increases and features become more tightly spaced.
Solution Approach 2:
The bitline structures and faceted trenches perform dual functions as both the final interconnect elements and as self-aligned masks for contact formation. The overhanging portions automatically define the contact opening locations through the spacer formation process, eliminating the need for separate alignment steps and maintaining manufacturing precision as feature sizes shrink and spacing decreases.
3Manufacturing precision
If self-aligned contact etches are implemented, then manufacturing precision improves, but process complexity increases
Solution Approach 1:
The method creates faceted trenches with overhanging portions as a preliminary step, which then serve as the self-aligned masks for contact etches. By preparing these geometric features in advance, the actual contact formation becomes a self-aligned process that requires no additional alignment steps or complex mask patterns, thereby improving manufacturing precision without proportionally increasing process complexity.
Solution Approach 2:
The faceted trench structures and bitlines serve dual purposes: as the final conductive elements and as self-aligned masks for contact opening formation. The overhanging portions automatically generate spacers that define contact locations, making the contact etch process self-aligned and eliminating the need for separate alignment procedures, thus improving precision while managing process complexity.
Data Source
AI summary
The invention includes methods of forming semiconductor constructions in which electrically conductive structures are formed between bitlines to electrically connect with storage node contacts. The bitlines can be formed within trenches having faceted top portions. The invention also includes semiconductor structures containing trenches with faceted top portions, and containing bitlines within the trenches.


