Facet-less Epitaxy via Cut Mask Isolation
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Solution Overview
Problem
The formation of facetted epitaxial raised source/drain regions at the edge of shallow trench isolation (STI) regions in semiconductor devices leads to reduced surface area, increasing resistance between the source/drain regions and contacts, which compromises device operation and yield due to poor electrical connections.
Innovation Solution
The method involves forming facet-less epitaxial regions by creating a continuous active layer on a substrate, depositing raised epitaxial layers, and using a cut mask to etch a trench structure that is filled with isolation material, ensuring the epitaxial layers are facet-less at the sidewalls and electrically connected without faceting issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxial growth is performed at the edge of shallow trench isolation regions, then raised source/drain regions are formed, but facetted shapes are created that reduce surface area and increase contact resistance
Solution Approach 1:
The patent applies preliminary action by forming the continuous active layer before performing epitaxial growth. This ensures that the epitaxial growth occurs on a pre-prepared, uniform surface that prevents facet formation during the growth process, thereby maintaining surface area and reducing contact resistance while still forming the raised source/drain regions.
Solution Approach 2:
The patent applies local quality by creating a continuous active layer specifically at the isolation region edges where epitaxial growth will occur. This localized preparation ensures that only the critical growth areas have the faceting-preventing structure, while other regions maintain their conventional architecture, thus solving the contact resistance issue without unnecessarily complicating the entire device structure.
2Manufacturing precision
If conventional STI processes are used, then isolation regions are formed, but STI divots are created that cause faceting during epitaxial growth
Solution Approach 1:
The patent modifies the STI process by applying a continuous active layer before epitaxial growth, rather than relying on post-growth adjustments. This preliminary preparation step ensures uniform growth conditions and prevents faceting, improving manufacturing precision without requiring complex additional process steps.
Solution Approach 2:
The patent changes the physical-chemical parameters of the growth interface by introducing a continuous active layer. This layer alters the surface properties and growth kinetics, preventing the faceting phenomenon that occurs with conventional STI divots, thereby achieving better shape control with a relatively simple parameter modification.
3Productivity
If raised source/drain regions are formed with facetted shapes, then epitaxial growth occurs, but surface area is reduced leading to poor electrical connections
Solution Approach 1:
The patent forms the continuous active layer before epitaxial growth to prevent faceting during the growth process. This preliminary action ensures that the raised source/drain regions maintain maximum surface area from the outset, ensuring good electrical connections and high device yield without requiring subsequent corrective steps.
Solution Approach 2:
The patent applies the continuous active layer specifically at the locations where epitaxial growth occurs, ensuring that the critical surface area regions are protected from faceting. This localized application maintains surface area where it matters most for electrical connectivity, directly impacting device yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the surface area of epitaxial source/drain regions, reducing contact resistance and improving device connectivity, thereby increasing the reliability and yield of semiconductor devices by avoiding the formation of facets at the isolation region edges.
Implementation Method 1
depositing a first raised epitaxial layer on a first region of the continuous active layer. A second raised epitaxial layer is deposited on a second region of the continuous active layer
Implementation Method 2
A first cut mask is used to etch a trench structure into the continuous active layer at both the first and the second raised epitaxial layer
Data Source
AI summary
A method of forming a semiconductor structure on a substrate is provided. The method may include preparing a continuous active layer on a region of the substrate and depositing a first raised epitaxial layer on a first region of the continuous active layer. A second raised epitaxial layer is also deposited on a second region of the continuous active layer such that the first raised epitaxial layer is in close proximity to the second raised epitaxial layer. A mask may be used to etch a trench structure into the continuous active layer at both the first and the second raised epitaxial layer, whereby the etched trench structure is filled with isolation material for electrically isolating the first raised epitaxial layer from the second raised epitaxial layer.