Factorized Current-Mode Data Converters for Asynchronous AI MACs

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Solution Overview

Problem

Current digital AI & ML solutions are costly and power-hungry, making them unsuitable for edge or sensor applications, where low-power, low-cost, and asynchronous signal processing is required, and they often rely on expensive deep sub-micron manufacturing.

Innovation Solution

The development of current-mode data-converters, multipliers, and multiply-accumulate circuits that can interface with digital systems, operate at low power, and perform signal processing asynchronously, using mainstream CMOS fabrication for cost-effectiveness and compatibility with existing hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If standard digital solutions are used for AI & ML applications, then ease of interface compatibility and programming flexibility are improved, but power consumption and manufacturing cost increase significantly

Engineering Contradiction:

Improveinterface compatibilityVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent replaces standard digital processing circuits with analog mixed-signal processing circuits that perform AI & ML operations directly in the analog domain. This substitution eliminates the need for continuous digital-to-analog conversions and reduces dynamic power consumption by operating at lower frequencies and voltages, while maintaining interface compatibility through standardized input/output interfaces.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating parameters by using mainstream CMOS fabrication processes (45nm to 90nm) instead of bleeding edge deep sub-micron processes. This parameter change reduces manufacturing cost and power consumption while achieving sufficient performance for edge AI & ML applications through optimized analog circuit design and signal processing techniques.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If bleeding edge deep sub-micron manufacturing is used for digital AI & ML chips, then processing speed and computational power are improved, but manufacturing cost and power consumption increase

Engineering Contradiction:

Improvecomputational powerVSAvoidmanufacturing cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent substitutes digital computational architectures with analog mixed-signal processing architectures that perform computations continuously in the analog domain. This substitution achieves high computational power for AI & ML operations without requiring expensive deep sub-micron manufacturing, as analog circuits can be effectively fabricated using mainstream CMOS processes.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs simpler, less expensive analog circuit components and mainstream CMOS fabrication processes instead of expensive deep sub-micron digital circuits. The design accepts certain levels of noise and imperfections in exchange for significantly reduced manufacturing cost, making AI & ML processing economically viable for edge devices.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Loss of time

If clock-synchronized digital processing is used, then timing precision and coordination are improved, but dynamic power consumption and noise increase

Engineering Contradiction:

Improvetiming precisionVSAvoiddynamic power consumption

Core Design Contradiction:

Loss of timeVSLoss of energy

Solution Approach 1:

The patent eliminates periodic clock signaling in favor of asynchronous event-driven operation. Data converters and processing circuits operate based on the arrival of input signals rather than synchronized clock edges, reducing dynamic power consumption and noise while maintaining adequate timing precision through careful design of signal paths and buffering.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS10804925B1Tiny factorized data-converters for artificial intelligence signal processing

Publication Date: 2020.10.13 FAR ALI TASDIGHI

AI summary

Multipliers and Multiply-Accumulate (MAC) circuits are fundamental building blocks in signal processing, including in emerging applications such as machine learning (ML) and artificial intelligence (AI) that predominantly utilize digital-mode multipliers and MACs. Generally, digital multipliers and MACs can operate at high speed with high resolution, and synchronously. As the resolution and speed of digital multipliers and MACs increase, generally the dynamic power consumption and chip size of digital implementations increases substantially that makes them impractical for some ML and AI segments, including in portable, mobile, near edge, or near sensor applications. The multipliers and MACs utilizing the disclosed current mode data-converters are manufacturable in main-stream digital CMOS process, and they can have medium to high resolutions, capable of low power consumptions, having low sensitivity to power supply and temperature variations, as well as operating asynchronously, which makes them suitable for high-volume, low cost, and low power ML and AI applications.