Fail Bit Counter Circuit for Semiconductor Memory Reliability
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Solution Overview
Problem
Current semiconductor memory devices lack an efficient method to cumulatively count fail bits, which is essential for determining the reliability of memory cells without additional equipment, thereby increasing costs and complexity.
Innovation Solution
A fail bit counter is introduced, comprising a pass/fail data receiver and a fail bit accumulator, which receives pass/fail data and generates a fail bit generation signal to cumulatively count fail bits, utilizing a series of flip-flops and multiplexers to activate fail bit signals based on the number of fail bits detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a fail bit counter is added to count fail bits cumulatively, then measurement precision of fail bits is improved, but device complexity increases
Solution Approach 1:
The fail bit counter is divided into multiple independent accumulators (first accumulator, second accumulator, third accumulator, etc.), each responsible for counting a specific range of fail bits. This segmentation allows the system to achieve precise fail bit measurement while keeping each individual accumulator relatively simple in structure.
Solution Approach 2:
The patent uses multiple accumulators operating in parallel to count fail bits simultaneously in different ranges. By adding this dimensional aspect of parallel processing, the system achieves comprehensive fail bit measurement without requiring a single complex counter, thus improving measurement precision while managing device complexity.
2Measurement precision
If multiple accumulators are used to count different ranges of fail bits, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The measurement range is segmented into multiple intervals, with each accumulator handling a specific interval (e.g., first accumulator for 0-10 fail bits, second accumulator for 10-20 fail bits). This segmentation enables precise measurement across different fail bit ranges while keeping each accumulator's internal logic relatively simple and manageable.
Solution Approach 2:
Each accumulator is designed with similar internal structure and functionality, allowing them to serve multiple purposes: counting fail bits in their specific range, generating pass/fail signals, and providing cumulative counting capability. This multi-functionality reduces overall device complexity by using standardized building blocks.
3Measurement precision
If pass/fail data is received and processed through flip-flops and multiplexers, then measurement precision is improved, but ease of operation deteriorates
Solution Approach 1:
The fail bit counter automatically receives pass/fail data from memory cells and processes it through the flip-flop and multiplexer network without requiring external intervention. The system self-manages the counting operation, updating accumulators and generating results autonomously, which maintains measurement precision while simplifying operation for the user.
Solution Approach 2:
The flip-flops are pre-configured to latch pass/fail data, and multiplexers are pre-set to route data to appropriate accumulators based on fail bit ranges. This preliminary configuration enables automatic and accurate processing of pass/fail data without requiring complex operational steps from the user.
Data Source
AI summary
Provided herein is a fail bit counter. The fail bit counter includes a pass/fail data receiver receiving pass/fail data indicating whether memory cells coupled to a bit line sequentially pass or fail, and a fail bit accumulator receiving a fail bit generation signal from the pass/fail data receiver, and accumulating and counting fail bits which are generated.