Failsafe Devices in Autonomous Vehicle Power Management
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Solution Overview
Problem
Current mechanisms are inadequate for addressing power failures in autonomous vehicles, which can pose risks to occupants by disrupting critical sub-systems like the powertrain, brake, and steering systems.
Innovation Solution
A vehicle system incorporating first and second failsafe devices with processors and memory, connected via an arbitration bus, that detect faults and communicate to ensure redundant operations and failover capabilities, enabling the vehicle to maintain functionality even in the event of power or communication failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant failsafe devices and communication buses are implemented, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the failsafe functionality into separate, independent devices that can operate autonomously. Each failsafe device includes its own processor and memory, allowing it to detect faults and execute failover procedures independently of the main vehicle control systems. This extraction enables redundancy without requiring complete duplication of the entire vehicle control architecture.
Solution Approach 2:
The arbitration bus serves as an intermediary communication channel between failsafe devices and other vehicle sub-systems. It provides a dedicated pathway for fault detection communications and failover coordination, reducing the complexity burden on existing communication networks while enabling reliable fault management across the vehicle system.
2Reliability
If fault detection and communication mechanisms are added, then reliability is improved, but use of energy increases
Solution Approach 1:
The failsafe devices perform fault detection and communication operations periodically rather than continuously. The system monitors for faults at scheduled intervals and only activates full failover procedures when actually needed. This periodic operation significantly reduces energy consumption compared to continuous monitoring while maintaining adequate safety coverage.
Solution Approach 2:
The failsafe devices are designed as lightweight, energy-efficient components with simplified processors and memory systems. Rather than using high-performance computing resources continuously, the system employs dedicated fault-detection units that consume minimal power during normal operation and only engage full computational resources when faults are detected and failover is required.
Data Source
AI summary
A system includes first and second failsafe devices. Each of the failsafe devices includes a processor and a memory. The memory stores instructions executable by the processor for performing at least one of detecting a fault and providing a communication concerning a fault. The system further includes an arbitration bus connecting the first and second failsafe devices. The communication concerning the fault may be provided from a first one of the first and second failsafe devices to a second one of the first and second failsafe devices.