Failsafe Input-Output Circuit Back-Current Protection

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Solution Overview

Problem

Existing IO devices in embedded systems face challenges with leakage currents and high power consumption due to back-current flow from peripheral devices, especially when disabled, and existing solutions require large design areas and additional components, which are inefficient for low-power systems.

Innovation Solution

An integrated circuit with an IO buffer that includes a driver and bias generation circuit to control output transistors based on control voltages, preventing back-current flow and reducing current consumption by operating in multiple modes, using a non-cascoded driver circuit with redundant components to manage voltage differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing IO devices are used to interface with external peripheral devices, then data communication between system and peripheral devices is enabled, but leakage currents and high power consumption occur due to back-current flow from peripheral devices

Engineering Contradiction:
Improveprevention of back-current damageVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary anti-action by implementing a protection circuit that proactively prevents back-current from reaching the power supply terminal. The circuit includes a first transistor configured to block back-current flow from the IO terminal to the power supply terminal, and a second transistor configured to discharge accumulated charge from the IO terminal to ground, thereby preventing damage before it occurs rather than reacting after damage happens.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent uses intermediary elements (the first and second transistors) positioned between the IO terminal and the power supply terminal to mediate the harmful back-current flow. These transistors act as controlled switches that can selectively connect or disconnect protection paths, allowing normal operation while blocking harmful currents through intermediate protection stages.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If existing solutions are implemented to prevent back-current flow, then protection from back-currents is achieved, but large design areas and additional components are required

Engineering Contradiction:
Improveprotection from back-currentsVSAvoiddesign area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the protection function with the existing IO device structure by integrating the first and second transistors into the IO device's current path. Rather than adding completely separate protection circuits, the transistors are positioned to work within the existing device architecture, sharing space and functional paths with the IO terminal and power supply connections.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The first transistor serves multiple functions: it acts as a protection element against back-current, functions as a switching element for controlling IO terminal connectivity, and can participate in normal signal transmission when in the on-state. This multi-functionality reduces the need for dedicated separate protection components, thereby minimizing additional area requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260066902A1Failsafe input-output circuit
Publication Date: 2026.03.05 TEXAS INSTRUMENTS INC
  • US20260066902A1 patent drawing
  • US20260066902A1 patent drawing
  • US20260066902A1 patent drawing

AI summary

A circuit includes an input-output, a supply terminal, a reference terminal, a high-side transistor, a low-side transistor, a driver, and a bias generation circuit. The driver circuit includes a first inverter having an output, a second inverter having an input, an output, and first and second supply inputs, and a transmission gate having an input, an output, and first and second enable inputs. The input of the second inverter is coupled to the output of the first inverter. The first enable input is coupled to the output of the first inverter, the second enable input is coupled to the output of the second inverter, the output of the transmission gate is coupled to the output of the driver, the first supply input of the second inverter is coupled to the output of the transmission gate, and the second supply input of the second inverter is coupled to a reference terminal.