False Collector and Guard Ring Layout for LDMOS Breakdown Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional power LDMOS devices face limitations in open-base collector-emitter breakdown voltage due to parasitic bipolar junctions, which restricts the maximum isolation voltage and current gain, especially when the base contact is floating or high-impedance coupled.

Innovation Solution

The implementation of false collector regions of opposite conductivity type to the base, shorted to the base, and shallow guard rings between false collectors and the collector/emitter, reduces common emitter mode current gain and prevents surface leakage, thereby enhancing the open-base collector-emitter breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If false collector regions are added to reduce common emitter mode current gain, then open-base collector-emitter breakdown voltage increases, but device structure becomes more complex

Engineering Contradiction:
Improveopen-base collector-emitter breakdown voltageVSAvoidisolation region structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation region is segmented into multiple functional zones: collector region, false collector regions (first and second), base region, and emitter region. This segmentation allows each zone to perform its specific function in managing carrier flow and preventing breakdown, thereby increasing breakdown voltage while maintaining manageable structural complexity through systematic division of functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

False collector regions are introduced as intermediary structures between the collector and base regions. These false collectors act as mediator zones that capture and redirect carriers, preventing direct high-field interactions between collector and base, thus increasing breakdown voltage without requiring fundamental redesign of the entire device structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If false collector regions are implemented to prevent surface leakage, then isolation effectiveness improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvelateral isolation effectivenessVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The formation of false collector regions is merged with the existing isolation region fabrication process. The same ion implantation and thermal diffusion steps that create the collector, base, and emitter regions are extended to also form the false collector regions, eliminating the need for separate manufacturing processes and maintaining ease of manufacture while improving isolation effectiveness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The isolation region structure is designed to serve multiple functions simultaneously: it provides lateral isolation between devices, forms parasitic bipolar junctions for voltage breakdown control, and creates false collector regions for carrier management. This multi-functionality reduces the need for additional dedicated structures and processes, maintaining manufacturing simplicity while achieving improved isolation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If dopant implantation is used to form false collector regions, then breakdown voltage increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecollector-emitter breakdown voltageVSAvoiddopant implantation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The false collector regions are formed using preliminary ion implantation of dopants at specific locations before final device operation. The implantation parameters (dose, energy, angle) are pre-calculated and pre-set during manufacturing to achieve the desired carrier concentration profiles. This preliminary action ensures that the correct amount of dopant is placed in the correct locations, reducing the need for post-manufacturing adjustments and lowering precision requirements during operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dopant concentration, implantation energy, and thermal diffusion time parameters are optimized to create the desired false collector regions with appropriate carrier concentrations. By adjusting these parameters within standard manufacturing ranges, the patent achieves improved breakdown voltage without requiring extreme precision that would be difficult to maintain in production environments.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly increases the open-base collector-emitter breakdown voltage by up to 15-20% while maintaining effective lateral isolation, reducing positive feedback that leads to avalanche breakdown, and does so without altering the existing fabrication process flow.

Implementation Method 1

implanting dopant of a first conductivity type into an epitaxial layer of semiconductor material to form first and second false collector regions

Methodology Applied
Scientific EffectDopant implantation: Ion Implantation

Implementation Method 2

implanting and driving-in a dopant of a first conductivity type into a semiconductor substrate to form a first buried layer

Methodology Applied
Scientific EffectThermal diffusion: Diffusion

Data Source

PatentUS12015054B2False collectors and guard rings for semiconductor devices
Publication Date: 2024.06.18 TEXAS INSTRUMENTS INC
  • US12015054B2 patent drawing
  • US12015054B2 patent drawing
  • US12015054B2 patent drawing

AI summary

A method includes implanting dopant of a first conductivity type into an epitaxial layer of semiconductor material to form first and second false collector regions adjacent to the surface of the epitaxial layer. The first false collector region is located laterally on a first side of a base region. The base region is formed within the epitaxial layer from dopant of a second conductivity type that is opposite the first conductivity type. The second false collector region is located laterally on a second side of the base region. The second side is opposite the first side of the base region. The base region is a base of a parasitic bipolar junction in an isolation region of an active semiconductor device.