Fan-Out Package Antenna Layout for RF Q-Factor Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in the semiconductor industry is to ensure the signal performance and reliability of radio frequency integrated circuits (RF-ICs) in package design, particularly in maintaining the Q-factor and reliability amidst the miniaturization of components and packages.

Innovation Solution

The solution involves fabricating an integrated fan-out package with a redistribution circuit structure that includes a wiring-free dielectric portion covering the antenna region, conductive pillars or vias, and a protection layer, which enhances signal performance and reliability by eliminating conductive layers within the dielectric portions and using dummy patterns that do not affect the signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional package design with conductive layers is used, then manufacturing is easier, but signal performance and Q-factor deteriorate

Engineering Contradiction:
Improvesignal performanceVSAvoidpackage structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the conductive layer from the dielectric portion that covers the antenna region, creating a wiring-free dielectric structure. This extraction eliminates the harmful interaction between conductive layers and RF signals, thereby improving Q-factor and signal performance while accepting increased structural complexity in the package design.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated, but package area decreases requiring smaller packages

Engineering Contradiction:
Improveintegration densityVSAvoidpackage area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent transitions from a two-dimensional planar layout to a three-dimensional stacked architecture by placing the antenna region and wiring-free dielectric portion vertically above the integrated circuit. This dimensional change allows higher integration density without proportionally reducing package area, as the expanded vertical space compensates for the compact horizontal footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If dummy patterns are added to the redistribution circuit structure, then manufacturing is facilitated, but they must not interfere with signal quality

Engineering Contradiction:
Improvefabrication processVSAvoidsignal quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies different structural qualities to different regions: the dielectric portion over the antenna region is wiring-free to maintain signal quality, while other regions can contain conductive layers and dummy patterns for manufacturing ease. This localized differentiation allows dummy patterns to be placed in non-critical areas where they aid fabrication without interfering with RF signal performance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11854993B2Integrated fan-out package
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11854993B2 patent drawing
  • US11854993B2 patent drawing
  • US11854993B2 patent drawing

AI summary

An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an antenna region. The insulating encapsulation encapsulates the integrated circuit. The redistribution circuit structure is disposed on the integrated circuit and the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit, and the redistribution circuit structure includes a redistribution region and a dummy region including a plurality of dummy patterns embedded therein, wherein the antenna region includes an inductor and a wiring-free dielectric portion, and the wiring-free dielectric portion of the antenna region is between the inductor and the dummy region.