3D Fan-Out Structure Fabrication via Aperture Substrate Carrier
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Solution Overview
Problem
Conventional fan-out wafer level packaging techniques for integrated circuit devices are costly, complex, and prone to yield loss due to die drift and topography issues caused by temporary tape/carrier processes, leading to reliability and manufacturability challenges.
Innovation Solution
A method involving a substrate carrier with opposing surfaces and an aperture, where semiconductor dies are bonded and encapsulated without temporary tape, allowing for coplanar placement and redistribution layers to form a 3D fan-out structure, simplifying the process and avoiding die drift and topography problems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional FOWLP fabrication uses temporary tape/carrier for die placement, then die and components can be held co-planar during assembly, but the process becomes complicated and costly due to specialized thermal, optical or mechanical removal processes
Solution Approach 1:
The patent removes the temporary tape/carrier from the process entirely, extracting the problematic element that caused complexity. Instead of placing die on tape and then removing it, the method directly bonds die to the substrate carrier, eliminating the need for specialized removal processes while maintaining coplanarity through direct bonding techniques
Solution Approach 2:
The patent segments the substrate carrier into distinct functional regions including a first surface for die bonding, an aperture for encapsulant filling, and a second surface for redistribution layer formation. This segmentation allows each region to perform its specific function without requiring temporary carriers, simplifying the overall process
2Ease of manufacture
If die and components are placed onto temporary tape prior to encapsulation, then assembly is facilitated, but die drift occurs due to encapsulant shrinking causing large yield loss
Solution Approach 1:
The patent performs preliminary bonding of die to the substrate carrier before encapsulation. By establishing secure mechanical and electrical connections in advance, the die are anchored in position before the encapsulant is applied, preventing any potential drift that would occur during encapsulation or subsequent processing
Solution Approach 2:
The substrate carrier acts as an intermediary between the die and the encapsulant. It provides a stable bonding surface that holds die in precise positions, and its rigid structure prevents the encapsulant from causing die drift during curing. The carrier mediates the interaction between die and encapsulant to eliminate yield loss
3Adaptability or versatility
If conventional processes use panelization and through package via processes for FOWLP, then 3D integration is achieved, but production cost and manufacturing complexity increase significantly
Solution Approach 1:
The patent merges multiple conventional processes into a single integrated flow. By combining die bonding, encapsulant filling, and redistribution layer formation into one continuous process on a unified substrate carrier, it eliminates the need for separate panelization and through-package via steps, reducing manufacturing complexity while maintaining 3D integration capability
Solution Approach 2:
The substrate carrier serves multiple functions simultaneously: it acts as a bonding substrate for die attachment, a mold cavity for encapsulant containment, and a support structure for redistribution layer formation. This multi-functionality consolidates what would otherwise require separate tools and processes, improving ease of manufacture
Data Source
AI summary
A method of fabricating a 3D fan-out structure for an integrated circuit device includes providing a substrate carrier having first and second opposing surfaces and an aperture extending between the first and second surfaces. A first semiconductor die is bonded to the first surface of the substrate carrier such that the first die covers the aperture of the substrate carrier. An encapsulant and a second die are deposited within the aperture of the substrate carrier such that an active surface of the second die is exposed and coplanar with the second surface of the substrate carrier. One or more redistribution layers are then applied on the second surface of the substrate carrier to form a 3D fan-out structure.