Integrated Fan-Out Package Barrier Layer Adhesion

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Solution Overview

Problem

Ensuring the reliability of integrated fan-out packages, which are becoming increasingly popular due to their compactness, is a critical issue in the semiconductor industry as they require advanced fabrication processes to maintain performance and prevent adhesion deterioration and delamination.

Innovation Solution

A process flow involving the formation of a protection layer with specific contact openings, followed by the deposition of a barrier layer and conductive vias, which are then embedded within these openings, ensuring the conductive vias are not in direct contact with the protection layer and thus preventing intermetallic compound diffusion and enhancing adhesion, is employed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conductive vias are formed directly in the protection layer, then the fabrication process is simplified, but intermetallic compound diffusion occurs and adhesion deteriorates

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidadhesion between protection layer and conductive vias
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A barrier layer is introduced as an intermediary between the protection layer and conductive vias. This barrier layer prevents direct contact between the protection layer and conductive vias, thereby blocking intermetallic compound diffusion and maintaining adhesion. The barrier layer serves as a mediator that resolves the contradiction by enabling via formation while preventing harmful chemical reactions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier layer is formed in advance before the conductive vias are deposited. This preliminary action ensures that the protective barrier is already in place to prevent intermetallic compound diffusion during subsequent thermal treatments and processing steps, thereby maintaining adhesion throughout the fabrication process.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If the package size is reduced for compactness, then integration density improves, but reliability maintenance becomes more difficult

Engineering Contradiction:
Improvepackage areaVSAvoidadhesion stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The interface structure is segmented into multiple distinct layers: protection layer, barrier layer, and conductive via. This segmentation allows each layer to perform its specific function independently, with the barrier layer specifically dedicated to preventing adhesion deterioration. This segmented approach enables reliable adhesion maintenance even in compact package designs where thermal and mechanical stresses are more concentrated.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor devices by maintaining adhesion between the protection layer and conductive vias, even after thermal treatments, thereby preventing delamination and ensuring the integrity of the integrated fan-out packages.

Implementation Method 1

ensuring the conductive vias are not in direct contact with the protection layer and thus preventing intermetallic compound diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS9812426B1Integrated fan-out package, semiconductor device, and method of fabricating the same
Publication Date: 2017.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9812426B1 patent drawing
  • US9812426B1 patent drawing
  • US9812426B1 patent drawing

AI summary

A semiconductor device including an integrated circuit, a protection layer, and a conductive via is provided. The integrated circuit includes at least one conductive pad. The protection layer covers the integrated circuit. The protection layer includes a contact opening, and the conductive pad is exposed by the contact opening of the protection layer. The conductive via is embedded in the contact opening of the protection layer, and the conductive via is electrically connected to the conductive pad through the contact opening. A method of fabricating the above-mentioned semiconductor device and an integrated fan-out package including the above-mentioned semiconductor device are also provided.