Fan-Out Package Buffer Layer for CTE Stress Relief

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Solution Overview

Problem

Ensuring the reliability of integrated fan-out packages in semiconductor technology, which face challenges due to stress from coefficient of thermal expansion (CTE) mismatch between package substrates and dies, leading to potential delamination and cracking.

Innovation Solution

Incorporating a buffer layer with a lower Young's modulus and specific CTE characteristics between the packages to act as a stress-release structure, thereby reducing stress concentrations and enhancing structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If integrated fan-out packages are made compact, then package size is reduced, but stress concentration increases leading to delamination and cracking

Engineering Contradiction:

Improvepackage sizeVSAvoidpackage reliability

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

A buffer layer is introduced as an intermediary structure between adjacent integrated fan-out packages. This buffer layer, positioned in the gap between packages and extending from the substrate surface to a height between 10-50 micrometers, acts as a stress-absorbing mediator that prevents stress transfer between packages, thereby eliminating delamination and cracking while maintaining compact package dimensions

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If buffer layer height is increased, then stress release capability is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvestress releaseVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer height is optimized to a specific parameter range (10-50 micrometers) that provides sufficient stress release capability while remaining compatible with existing manufacturing processes. This parameter optimization ensures effective stress absorption without requiring complex additional manufacturing steps or equipment

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The buffer layer effectively mitigates stress-induced delamination and cracking, improving the reliability and structural integrity of semiconductor packages by releasing thermal expansion mismatch-induced stress.

Implementation Method 1

stress from coefficient of thermal expansion (CTE) mismatch between package substrates and dies

Methodology Applied

Scientific EffectThermal expansion mismatch: Thermal Expansion

Implementation Method 2

buffer layer with a lower Young's modulus and specific CTE characteristics between the packages to act as a stress-release structure

Methodology Applied

Scientific EffectStress release: Stress Relaxation

Data Source

PatentUS11742322B2Integrated fan-out package having stress release structure

Publication Date: 2023.08.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor package includes a redistribution structure, a first die, a second die and a buffer layer. The second die is disposed between the first die and the redistribution structure, and the second die is electrically connected to the first die and bonded to the redistribution structure. The buffer layer is disposed on a first sidewall of the second die, wherein a second sidewall of the buffer layer is substantially flush with a third sidewall of the first die.