Integrated Fan-Out Package With Buffer Layer Guiding Trenches
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Solution Overview
Problem
As semiconductor dies become smaller, conventional packaging technologies face challenges in increasing I/O pad density and solder ball packing efficiency, leading to limitations in fan-in packages and potential solder bridges, while fan-out packages are restricted by the size and pitch of I/O pads.
Innovation Solution
The development of an Integrated Fan-Out (InFO) package with through-vias and guiding trenches in the buffer layer, which allows for redistribution of I/O pads to a larger area, enabling increased packing density and efficient underfill distribution by forming guiding trenches to control underfill flow and prevent heat conduction between packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If fan-in packaging is used to pack more I/O pads into smaller areas, then packaging density increases, but solder bridges may occur and the number of I/O pads is limited by die area
Solution Approach 1:
The patent transitions from two-dimensional I/O pad arrangement on the die surface to three-dimensional redistribution by forming via holes through the die substrate and routing traces in multiple layers, allowing I/O pads to be redistributed to a larger area beyond the original die footprint
Solution Approach 2:
The patent segments the I/O pad distribution by separating the input pads on the die surface from the output pads on the package surface, using via holes and intermediate trace layers to redistribute connections to a larger area with increased spacing
2Quantity of substance
If I/O pad pitch is decreased to increase packing density, then more I/O pads can be packed, but solder bridges may occur
Solution Approach 1:
The patent uses three-dimensional trace routing through multiple layers and via holes to increase the effective spacing between I/O connections, allowing denser pad layouts on the die surface while maintaining adequate solder ball spacing on the package surface
Solution Approach 2:
The patent segments the signal path into multiple segments across different layers, with each layer providing additional spacing opportunities, thereby preventing solder bridges even when pads are densely packed on the die surface
3Quantity of substance
If fan-out packaging is used to redistribute I/O pads to greater area, then I/O pad density increases, but the package size increases
Solution Approach 1:
The patent embeds the die within a substrate structure that provides the fan-out functionality, nesting the high-density I/O array within a compact package footprint by utilizing vertical space through multiple trace layers rather than expanding horizontally
4Strength
If underfill is used to fill gaps between die and substrate, then mechanical strength improves, but heat conduction between packages increases
Solution Approach 1:
The patent applies different material properties to different regions: using thermally conductive underfill in areas requiring mechanical support while using thermally insulating materials in areas requiring heat isolation, thereby achieving both mechanical strength and thermal management goals
Data Source
AI summary
A package includes a molding compound, a through-via penetrating through the molding compound, a device die molded in the molding compound, and a buffer layer on and contacting the molding compound. An opening is through the buffer layer to the through-via. The buffer layer has ripples in a plane parallel to an interface between the molding compound and the buffer layer and around a circumference of the opening. Other embodiments contemplate an additional package bonded to the package, and methods for forming the package.