Integrated Fan-Out Package With Capped Through Vias
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Solution Overview
Problem
As semiconductor dies become smaller and more functions are integrated, packaging becomes increasingly difficult due to limited I/O pad density and the risk of solder bridges, especially in conventional fan-in packages, which restricts the number of solder balls that can be packed on the die surface.
Innovation Solution
The development of an Integrated Fan-Out (InFO) package with capped through vias and redistribution layers (RDLs) allows for increased I/O pad density by redistributing pads to a larger area, reducing metal density in conductive caps to alleviate stress and enhance reliability during thermal cycling, and enabling the formation of fan-out packages with increased solder ball capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fan-in packaging is used to package smaller dies, then throughput is improved and cost is reduced, but the number of I/O pads is limited due to restricted pad distribution area
Solution Approach 1:
The patent transitions from fan-in packaging (where pads are restricted to the die surface area) to fan-out packaging (where pads are redistributed to a larger area extending beyond the die boundaries). This dimensional expansion allows the same die to support more I/O pads by utilizing the substrate area beyond the die footprint, thereby increasing the number of I/O pads while maintaining packaging efficiency
2Quantity of substance
If the pitch of I/O pads is decreased to increase pad density, then more pads can be packed, but solder bridges may occur reducing reliability
Solution Approach 1:
By redistributing I/O pads to a larger area through fan-out packaging, the patent increases the spacing between adjacent pads without requiring smaller pad pitches. This spatial redistribution maintains adequate solder ball spacing to prevent solder bridges while still achieving high I/O pad density through area expansion rather than pitch reduction
3Manufacturing precision
If fixed ball-size requirement is maintained, then solder ball size is controlled, but the number of solder balls that can be packed on the die surface is limited
Solution Approach 1:
The patent expands the packaging area beyond the die surface to the substrate area, allowing solder balls to be distributed over a larger region. This enables more solder balls to be accommodated while maintaining the same ball size specifications, thereby increasing the number of I/O pads without compromising manufacturing precision or solder ball quality
4Ease of manufacture
If conventional packaging is used, then process simplicity is maintained, but I/O pad density is limited by the die surface area
Solution Approach 1:
The patent implements fan-out packaging where the organic substrate extends beyond the die boundaries, creating a larger packaging footprint. This approach maintains relatively simple manufacturing processes while achieving higher I/O pad density by utilizing the extended substrate area for pad redistribution, thus breaking the constraint of die surface area limitation
Data Source
AI summary
A semiconductor device includes a molding compound and a through via extending through the molding compound. A via connection is disposed over the through via and a cap is disposed over the via connection. A plurality of holes are formed in a section of the cap.