Fan-Out Semiconductor Package for Image Sensor Stacking
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Solution Overview
Problem
The demand for miniaturization and high-performance image sensor devices in mobile products, such as smartphones and tablets, is increasing, but existing technologies face challenges in achieving multifunctionality and efficient yield due to limitations in packaging and connectivity methods, particularly with the use of fan-in and fan-out semiconductor packages.
Innovation Solution
The proposed solution involves a fan-out semiconductor package structure where a first semiconductor chip is packaged with a redistribution layer and sealing material, connected to a second semiconductor chip, which can be a logic chip, and a third semiconductor chip, which can be an image sensor, using a through electrode, allowing for a two-stack configuration that minimizes yield reduction and increases productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If fan-in or fan-out semiconductor packages are used with traditional packaging methods, then connectivity is achieved, but device size increases and productivity decreases
Solution Approach 1:
The device is segmented into multiple functional stacks: first semiconductor chips (sensors) mounted on a first substrate, second semiconductor chips (logic) mounted on a second substrate, and these stacks are vertically interconnected through through-electrodes. This segmentation allows parallel processing and assembly, improving productivity while maintaining compact form factor.
Solution Approach 2:
The patent transitions from traditional planar packaging to a three-dimensional stacked architecture where sensor chips and logic chips are arranged in vertical stacks connected by through-electrodes. This dimensional change reduces the footprint area while increasing functional density, thereby improving both miniaturization and productivity.
2Reliability
If through electrodes are used to connect semiconductor chips, then electrical connectivity is achieved, but yield reduction occurs due to defects
Solution Approach 1:
Through-electrodes are formed on the substrates before mounting the semiconductor chips. This preliminary action allows for pre-verification of electrical connectivity and enables replacement or rework of electrodes without discarding the entire device, thereby reducing yield loss from electrode defects.
Solution Approach 2:
The substrates act as intermediary elements between the through-electrodes and the semiconductor chips. This intermediary structure provides a buffer zone that isolates electrode defects from the chips, allowing for easier defect management and reducing the impact on overall yield.
3Reliability
If interposer substrates are used for mounting semiconductor chips, then connectivity is improved, but device complexity and size increase
Solution Approach 1:
The patent merges the substrate and interposer functions into a single integrated substrate structure. The substrates directly provide both mechanical support and electrical interconnection through the through-electrodes, eliminating the need for separate interposer substrates and reducing overall device complexity.
Solution Approach 2:
The substrates are designed to perform multiple functions simultaneously: providing mechanical support for chip mounting, establishing electrical connections through integrated through-electrodes, and enabling thermal management. This multi-functionality eliminates the need for dedicated interposer substrates, simplifying the overall device structure.
Data Source
AI summary
The present disclosure relates to an image sensor device including: a fan-out semiconductor package including a first semiconductor chip having an active surface on which a connection pad is disposed, a first connection member disposed on the active surface and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, and a sealing material disposed on the first connection member and sealing at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the first connection member and electrically connected to the first connection member; and a third semiconductor chip disposed on the second semiconductor chip and electrically connected to the second semiconductor chip, in which at least one of the second semiconductor chip or the third semiconductor chip may be an image sensor. The present disclosure also relates to an image sensor module including the image sensor device.