Fan-Out Optical Ports on Substrate Faces

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Solution Overview

Problem

The miniaturization of electronic dies in advanced CMOS nodes has led to challenges in electrical and optical interfacing, as well as thermal management, due to the high cost of these nodes, necessitating a solution that addresses electrical, optical, and thermal interfacing simultaneously.

Innovation Solution

The implementation of wafer-scale packaging with substrates featuring electrical ports on one face and optical ports in a fan-out configuration on the other face, allowing for efficient communication and thermal management by matching the pitch of optical fibers and connectors, and integrating optical waveguides and amplifiers to facilitate high-density optical input/output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If electronic dies are miniaturized in advanced CMOS nodes, then integration density is improved, but thermal management and optical interfacing become more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidthermal management
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

The substrate is divided into distinct functional regions: a first face for electrical ports and a second face for optical ports. This segmentation allows independent optimization of electrical and optical interfaces, and enables separate thermal management paths for high-power electrical components and sensitive optical components, resolving the thermal management challenge while maintaining high integration density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar integration to three-dimensional substrate utilization by placing electrical and optical ports on opposite faces of the substrate. This dimensional approach allows simultaneous high-density electrical interconnection on one face and optimized optical fiber coupling on the other face, achieving both miniaturization benefits and improved thermal/optical management

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If electronic dies are miniaturized in advanced CMOS nodes, then integration density is improved, but optical interfacing becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidoptical interfacing
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

By positioning optical ports on the second face of the substrate opposite the electrical ports, the patent enables optical fibers to couple directly with the optical connections without interfering with the miniaturized electronic die on the first face. This three-dimensional arrangement maintains high integration density while simplifying optical interfacing operations

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The substrate acts as an intermediary between the miniaturized electronic die and optical fibers. It provides dedicated optical ports with appropriate pitch and positioning that facilitate easy optical fiber coupling, while simultaneously providing electrical ports for high-density electrical interconnection, thus mediating between the conflicting requirements of miniaturization and optical interfacing

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If optical ports are positioned in fan-out configuration, then optical fiber pitch matching is improved, but substrate area is increased

Engineering Contradiction:
Improveoptical fiber pitch matchingVSAvoidsubstrate area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The fan-out configuration of optical ports on the second face utilizes the third dimension (substrate thickness) to achieve proper optical fiber pitch matching without proportionally increasing the substrate footprint. By distributing optical ports in a fan-out pattern across the face, the design achieves standard optical fiber pitch compatibility while minimizing the required substrate area

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables effective off-chip optical and electrical communication while minimizing thermal strain and optimizing substrate real estate, allowing for practical thermal management and efficient interfacing of integrated circuits with optical fibers.

Implementation Method 1

The plurality of optical ports may be communicatively coupled to the plurality of optical connections by a plurality of optical waveguides

Methodology Applied
Scientific EffectOptical waveguide: Waveguide (optics)

Implementation Method 2

integrating optical waveguides and amplifiers to facilitate high-density optical input/output

Methodology Applied
Scientific EffectOptical amplifier: Magnetic Amplifier

Data Source

PatentUS10120148B2Devices with optical ports in fan-out configurations
Publication Date: 2018.11.06 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10120148B2 patent drawing
  • US10120148B2 patent drawing
  • US10120148B2 patent drawing

AI summary

Examples herein relate to devices with optical ports in fan-out configurations. An electrical device may have a substrate with an electrical port on a first face of the substrate and a plurality of optical ports on a second face of the substrate. The plurality of optical ports may be positioned in a fan-out configuration on the second face of the substrate. The electrical device may also have an integrated circuit with an electrical connection and a plurality of optical connections. A first face of the integrated circuit may be coupled to the substrate. The electrical connection of the integrated circuit may be communicatively coupled to the electrical port of the substrate, and the plurality of optical connections may be communicated coupled to the plurality of optical ports of the substrate.