Integrated Fan-Out Redistribution Structure for Overlay Alignment

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Solution Overview

Problem

Integrated fan-out packages face challenges related to compactness and alignment accuracy, which affect the integration density and reliability of electronic components.

Innovation Solution

A manufacturing process for integrated fan-out packages involving a redistribution structure with precise alignment marks and conductive vias, utilizing a carrier with a de-bonding layer and multiple layers of dielectric and conductive materials, along with conductive structures and dies, to enhance alignment and electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If integrated fan-out packages use repeated reductions in minimum feature size to improve integration density, then integration density is improved, but alignment accuracy deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidalignment accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent divides the alignment mark structure into multiple segments including a base layer, intermediate layers, and top layers with different materials and functions. This segmentation allows each layer to be optimized independently for its specific function while maintaining overall alignment accuracy despite feature size reductions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional alignment marks to three-dimensional multi-layer structures with vertical stacking. This dimensional change provides additional alignment information and redundancy, improving alignment accuracy even as horizontal feature sizes are reduced to increase integration density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If integrated fan-out packages reduce minimum feature size to improve integration density, then integration density is improved, but package area is reduced

Engineering Contradiction:
Improveintegration densityVSAvoidpackage area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent implements nested multi-layer structures where alignment marks, conductive vias, and dielectric layers are stacked vertically within a compact footprint. This nesting approach maximizes integration density by utilizing the vertical dimension while maintaining a small package area

Inventive Principle:
Principle #7Nested doll (Nesting)

3Area of stationary object

If integrated fan-out packages use compact designs to reduce package area, then package area is reduced, but alignment failure rate increases

Engineering Contradiction:
Improvepackage areaVSAvoidalignment failure rate
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent changes material parameters by using high-k dielectric materials and conductive materials with different resistivities in various layers. These parameter changes enable precise control of electrical and mechanical properties, improving alignment reliability in compact packages

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite structures combining multiple materials including dielectric layers, conductive vias, and alignment mark materials with different physical and electrical properties. This composite approach provides both mechanical stability for alignment and electrical functionality while maintaining compact dimensions

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS12412867B2Integrated fan-out package and manufacturing method thereof
Publication Date: 2025.09.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12412867B2 patent drawing
  • US12412867B2 patent drawing
  • US12412867B2 patent drawing

AI summary

An integrated fan-out (InFO) package includes a die, an encapsulant laterally encapsulating the die, and a redistribution structure. The redistribution structure is disposed on the encapsulant. The redistribution structure includes a plurality of routing patterns and a plurality of alignment marks. The routing patterns are electrically connected to the die. The alignment marks surround the routing patterns. The alignment marks are electrically insulated from the die and the routing patterns. At least one of the alignment marks is in physical contact with the encapsulant, and the alignment marks located at different level heights are arranged in a non-overlapping manner vertically.