Fan-Out Package Structure With Backside RDL for POP Reliability

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Solution Overview

Problem

The semiconductor industry faces challenges in integrating smaller electronic components into compact packages with reliable connections, particularly in package-on-package (POP) structures, where existing technologies struggle to ensure robust electrical connectivity and structural integrity.

Innovation Solution

A method is developed for fabricating an integrated fan-out package with a back-side redistribution layer structure that includes a de-bonding layer, dielectric layers, and redistribution conductive layers, along with conductive pillars and vias, to provide reliable electrical connections and protect components during processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional packaging methods are used for smaller electronic components, then manufacturing simplicity is maintained, but electrical connection reliability and structural integrity deteriorate

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidpackage structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The package structure is segmented into multiple functional layers including substrate, insulating encapsulation, redistribution layer structure with conductive pillars and vias, and connection structures. This segmentation allows each layer to perform its specific function optimally, ensuring reliable electrical connections while maintaining manufacturability through modular fabrication processes

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention transitions from planar packaging to three-dimensional package-on-package structure with vertical stacking of semiconductor dies and redistribution layers. This dimensional change enables improved electrical connectivity and structural integrity by utilizing vertical space for signal routing and mechanical support

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If compact package designs are implemented, then area utilization is improved, but structural integrity and warpage control worsen

Engineering Contradiction:

Improvepackage areaVSAvoidstructural stability

Core Design Contradiction:

Area of stationary objectVSStability of the object's composition

Solution Approach 1:

The package employs composite material structures including substrate, insulating encapsulation, conductive pillars, and redistribution layers made of different materials with complementary properties. This composite approach balances thermal expansion, mechanical strength, and electrical conductivity to maintain structural stability in compact designs

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

Different regions of the package are designed with locally optimized properties: the substrate provides mechanical support, the insulating encapsulation provides electrical isolation, and the redistribution layer provides electrical connectivity. This local quality optimization ensures structural integrity while maximizing area utilization

Inventive Principle:

Principle #3Local quality

3Quantity of substance

If integration density is increased, then component miniaturization is achieved, but manufacturing precision requirements worsen

Engineering Contradiction:

Improveintegration densityVSAvoidfabrication precision

Core Design Contradiction:

Quantity of substanceVSManufacturing precision

Solution Approach 1:

The redistribution layer structure with pre-formed conductive pillars and vias is prepared in advance on the substrate before mounting semiconductor dies. This preliminary action establishes precise electrical connection points beforehand, reducing the precision requirements during die mounting and assembly processes

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The redistribution layer structure acts as an intermediary between the substrate and semiconductor dies, providing a buffer that accommodates dimensional variations and alignment tolerances. This intermediary layer simplifies manufacturing precision requirements by decoupling the precision requirements of different fabrication steps

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12564089B2Package structure

Publication Date: 2026.02.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A package structure including a semiconductor die, a redistribution layer structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution layer structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution layer structure includes a backside dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the backside dielectric layer and the inter-dielectric layers. The electronic device is disposed over the backside dielectric layer and electrically connected to an outermost redistribution conductive layer among the redistribution conductive layers, wherein the outermost redistribution conductive layer is embedded in the backside dielectric layer, and the backside dielectric layer comprises a ring-shaped recess covered by the outermost redistribution conductive layer.