Fan-Out Package Structure Thermal Compression Bonding
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Solution Overview
Problem
The semiconductor industry faces manufacturing challenges in developing new packaging technologies for semiconductor devices, particularly in achieving uniformity and reliability in 3D packaging structures, which affect the integration density and functionality of electronic components.
Innovation Solution
A thermal compression process is used to bond a protective substrate to conductive structures on a carrier substrate, ensuring uniform joint heights and enhancing interface adhesion, while a protective layer is formed to surround the semiconductor die, reducing warpage and improving package structure quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If new packaging technologies are developed to improve density and functionality, then integration density increases, but manufacturing challenges and reliability issues arise
Solution Approach 1:
The patent applies preliminary action by performing alignment and bonding preparation steps before the actual thermal compression bonding process. The carrier substrate is pre-aligned with the protective substrate, and bonding surfaces are prepared in advance, ensuring that when thermal compression is applied, uniform bonding heights are achieved without manufacturing defects.
Solution Approach 2:
The patent utilizes parameter changes by controlling temperature and pressure parameters during the thermal compression bonding process. By carefully adjusting these parameters, the bonding process achieves both high integration density through precise alignment and high reliability through uniform bonding, resolving the contradiction between density improvement and manufacturing challenges.
2Manufacturing precision
If thermal compression process is used to bond protective substrate, then uniform joint heights and interface adhesion are achieved, but process complexity increases
Solution Approach 1:
The patent merges multiple functions into the thermal compression bonding process: alignment, bonding, and height control are all achieved in a single integrated process step. This reduces overall process complexity while maintaining manufacturing precision for joint height uniformity, as the same thermal compression apparatus performs multiple functions simultaneously.
3Stability of the object's composition
If protective layer is formed to surround semiconductor die, then warpage is reduced and package quality improves, but manufacturing steps increase
Solution Approach 1:
The protective layer is formed as part of the preliminary preparation before bonding, or integrated into the bonding process itself. This preliminary formation of the protective layer prevents warpage during subsequent processing steps, improving package structure stability without requiring additional separate manufacturing steps after bonding is complete.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The thermal compression process ensures uniform bonding heights and improved adhesion, leading to enhanced reliability and quality of the package structure, addressing the challenges of uniformity and integration density in 3D packaging.
Implementation Method 1
A thermal compression process is used to bond a protective substrate to conductive structures on a carrier substrate
Implementation Method 2
pressing a protective substrate against the carrier substrate at an elevated temperature to bond the protective substrate to the conductive structure
Data Source
AI summary
A package structure is provided. The package structure includes a first redistribution structure and a second redistribution structure over the first redistribution structure. The package structure also includes. The package structure further includes a semiconductor chip between the first redistribution structure and the second redistribution structure. In addition, the package structure includes a protective layer surrounding the semiconductor chip and a conductive structure penetrating through the protective layer. The conductive structure has a solder element and a conductive pillar, the conductive pillar has a first end and a second end, and the first end is between the second end and the solder element. The solder element has a protruding portion extending from an interface between the conductive pillar and the solder element towards the second end. A terminal of the protruding portion is vertically between the first end and the second end.