Fan-Out Package Structure Without Hot-Press Through-Hole Bonding
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Solution Overview
Problem
Existing memory chip manufacturing processes are complex, costly, and inefficient due to the need for hot-pressing bonding of silicon through-holes and micro copper pillars, leading to limited product performance and high production costs.
Innovation Solution
A fan-out package structure and method that includes a chip, inner substrate, bonding patch layer, encapsulation layer, insulation support layer, interconnection line structure, package pins, and electrically conductive layers, which reduces the need for silicon through-holes and eliminates hot-pressing bonding, thereby simplifying the manufacturing process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon through-holes and micro copper pillars are arranged and fixed through hot-pressing bonding, then electrical connection is achieved, but the arrangement process becomes complicated and material cost increases
Solution Approach 1:
The patent extracts and eliminates the silicon through-holes and micro copper pillars from the chip structure, replacing them with a simplified wire bonding process. This removes the complex hot-pressing bonding step while maintaining electrical connection functionality through alternative means (wire bonds connecting chip pads to substrate pads).
Solution Approach 2:
The patent replaces the mechanical hot-pressing bonding system with a wire bonding system. Instead of using mechanical pressure and heat to form through-holes and solder connections, the invention uses wire bonding technology to establish electrical connections, thereby simplifying the manufacturing process and reducing equipment requirements.
2Reliability
If hot-pressing bonding process is used to fix silicon through-holes and micro copper pillars, then electrical connection is established, but production efficiency decreases and equipment cost increases
Solution Approach 1:
The patent replaces the hot-pressing bonding process with wire bonding technology. This substitution eliminates the need for expensive hot-pressing equipment and reduces production time, thereby improving productivity while maintaining reliable electrical connections through the wire bonding process.
3Reliability
If silicon through-holes and micro copper pillars are used for electrical connection, then connection reliability is achieved, but manufacturing cost increases
Solution Approach 1:
The patent uses wire bonds as a cost-effective alternative to expensive silicon through-holes and micro copper pillars. Wire bonding materials are significantly cheaper and the process is more economical, reducing overall manufacturing costs while achieving the same electrical connection function.
Solution Approach 2:
The patent replaces the costly hot-pressing bonding system with a more economical wire bonding process, reducing equipment investment and material costs while maintaining connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The fan-out package structure improves production efficiency, reduces manufacturing costs, and enhances product performance by enabling electric signal transmission through conductive layers, improving heat dissipation, and eliminating the complexity of hot-pressing bonding.
Implementation Method 1
the first electrically conductive hole is filled therein with the first electrically conductive layer; the second electrically conductive hole is filled therein with the second electrically conductive layer, and the second electrically conductive layer is in electrical connection with the at least one chip pin pad and the first electrically conductive layer
Implementation Method 2
the bonding patch layer is in contact with both the non-functional surface and one side of the inner substrate
Data Source
AI summary
A fan-out package structure and a fan-out package method are provided. The fan-out package structure includes: a chip, an inner substrate, a bonding patch layer, an encapsulation layer, an insulation support layer, an interconnection line structure, package pins, a first electrically conductive layer and a second electrically conductive layer.