Fan-Out Semiconductor Package EMI Shielding via RDL Nesting
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Solution Overview
Problem
Fan-out type semiconductor packages lack effective shielding against electromagnetic interference (EMI), which can cause malfunctions in semiconductor chips.
Innovation Solution
Incorporating a shielding pattern in the redistribution layer (RDL) structures, including side, upper, and lower shielding patterns with specific thicknesses and widths, to surround and protect the semiconductor chip from EMI, with the shielding patterns being electrically connected to a ground terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shielding patterns are added to the RDL structures, then EMI protection is improved, but device complexity increases
Solution Approach 1:
The shielding patterns are nested within the existing RDL structures, with upper, lower, and side shielding patterns integrated into the upper RDL structure, lower RDL structure, and middle RDL structure respectively. This nesting approach provides comprehensive EMI protection while utilizing the existing structural framework, thereby limiting the increase in device complexity.
Solution Approach 2:
The shielding structure is segmented into three distinct parts: upper shielding pattern in the upper RDL structure, lower shielding pattern in the lower RDL structure, and side shielding pattern in the middle RDL structure. Each segment targets specific portions of the semiconductor chip, providing comprehensive coverage while allowing independent optimization of each shielding component.
2Reliability
If shielding patterns with specific thickness and width are used, then EMI shielding effectiveness is improved, but manufacturing precision requirements increase
Solution Approach 1:
Specific dimensional parameters are defined for the shielding patterns to ensure effective EMI shielding: the upper and lower shielding patterns have a thickness of no less than about 5 μm, and the side shielding pattern has a width of no less than about 5 μm. These parameter specifications provide clear manufacturing guidelines while ensuring adequate shielding performance through optimized dimensional values.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively shields the semiconductor chip from electromagnetic interference, preventing malfunctions by ensuring comprehensive coverage of the chip's surfaces with the shielding patterns.
Implementation Method 1
an upper shielding pattern arranged in the upper RDL structure to shield the semiconductor chip from electromagnetic interference (EMI); a lower shielding pattern arranged in the lower RDL structure to shield the semiconductor chip from the EMI; and a side shielding pattern arranged in the middle RDL structure to shield the semiconductor chip from the EMI
Data Source
AI summary
A fan-out type semiconductor package includes: a frame including a cavity and a middle redistribution layer (RDL) structure at least partially surrounding the cavity; a semiconductor chip in the cavity; a lower RDL structure on the frame and electrically connected with the semiconductor chip and the middle RDL structure; an upper RDL structure on the frame and electrically connected with the middle RDL structure; an upper shielding pattern in the upper RDL structure to shield the semiconductor chip from electromagnetic interference (EMI); a lower shielding pattern in the lower RDL structure to shield the semiconductor chip from the EMI; and a side shielding pattern in the middle RDL structure to shield the semiconductor chip from the EMI. The upper shielding pattern and the lower shielding pattern have a thickness of no less than about 5 μm, and the side shielding pattern has a width of no less than about 5 μm.