Fan-Out Package Structure With CTE-Mediating Insulator Layer

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Solution Overview

Problem

The semiconductor industry faces challenges in integrating smaller electronic components into compact packages due to mismatched coefficients of thermal expansion (CTE) and warpage issues, which affect the reliability and performance of fan-out packages.

Innovation Solution

A package structure is developed with a film layer between the die and encapsulant to mitigate CTE mismatch, using a redistribution layer (RDL) and through-integrated vias (TIVs) to connect components, and incorporating antennas for signal transmission, with a de-bonding layer for carrier release.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a fan-out package structure is used to achieve compactness, then the package size is reduced, but CTE mismatch and warpage issues occur

Engineering Contradiction:
Improvepackage sizeVSAvoidCTE mismatch and warpage
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

An insulator layer with intermediate CTE value is introduced between the die (low CTE) and encapsulant (high CTE) to act as a mediator. This insulator layer has a coefficient of thermal expansion that is less than the encapsulant but greater than the die, creating a gradual transition that reduces the CTE mismatch and prevents warpage in the compact fan-out package structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If smaller electronic components are integrated to increase integration density, then more components fit in a given area, but package compactness is reduced

Engineering Contradiction:
Improveintegration densityVSAvoidpackage size
Core Design Contradiction:
ProductivityVSVolume of moving object

Solution Approach 1:

The package structure utilizes vertical stacking and three-dimensional arrangement of components, including placing the die on the substrate, adding an encapsulant layer above the die, and incorporating through-vias that extend through multiple layers. This dimensional approach allows high integration density without proportionally increasing the package footprint, achieving compactness while maintaining high component density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure effectively reduces CTE mismatch and warpage, enhancing the reliability and performance of fan-out packages by ensuring uniform thermal expansion and efficient signal transmission.

Implementation Method 1

The insulator has a coefficient of thermal expansion less than a coefficient of thermal expansion of the encapsulant. The through via extends through the insulator to connect to the conductive feature structure

Methodology Applied
Scientific EffectCoefficient of thermal expansion (CTE) mismatch mitigation: Thermal Expansion

Implementation Method 2

The adhesive layer is disposed below the die. The die is disposed over the conductive feature structure

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 3

The encapsulant is disposed on the insulator and the conductive feature structure, laterally encapsulating the die and the through via, and between the through via and the insulator

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS20250273556A1Package structure and method of manufacturing the same
Publication Date: 2025.08.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250273556A1 patent drawing
  • US20250273556A1 patent drawing
  • US20250273556A1 patent drawing

AI summary

A package structure includes a conductive feature structure, a die, an adhesive layer, an insulator, a through via, and an encapsulant. The die is disposed over the conductive feature structure. The adhesive layer is disposed below the die. The insulator is disposed between the adhesive layer and a polymer layer of the conductive feature structure. The through via extends through the insulator to connect to the conductive feature structure. The encapsulant is disposed on the insulator and the conductive feature structure, laterally encapsulating the die and the through via, and between the through via and the insulator. The insulator has a coefficient of thermal expansion less than a coefficient of thermal expansion of the encapsulant.