Fan-Out Semiconductor Package With Encapsulant Recess
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Fan-in semiconductor packages face challenges in accommodating a large number of I/O terminals and compact size requirements, leading to spatial limitations and difficulties in direct mounting on electronic device main boards, while fan-out packages aim to address these issues by redistributing connection terminals outwardly but require improved structural stability to handle thermal and mechanical stresses.
Innovation Solution
A fan-out semiconductor package design that includes a first interconnection member with a through-hole, a semiconductor chip, an encapsulant covering the inactive surface, and a second interconnection member, where the encapsulant fills spaces between the interconnection members and the chip, extending to fix edge portions and alleviate thermal or mechanical stress, promoting structural stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If fan-in semiconductor package is used, then compact size is achieved, but spatial limitations occur and direct mounting on main boards becomes difficult
Solution Approach 1:
The patent transitions from fan-in configuration (terminals confined within chip footprint) to fan-out configuration (terminals redistributed outward beyond chip edges), effectively utilizing the dimensional space around the chip to resolve spatial limitations while maintaining compact overall package volume
2Adaptability or versatility
If fan-out package is used to redistribute connection terminals outwardly, then mounting capability is improved, but structural stability deteriorates under thermal and mechanical stresses
Solution Approach 1:
The patent introduces a recess structure in the encapsulant that receives and secures the protruding interconnection member, providing pre-established mechanical support and stress distribution to prevent structural failure under thermal and mechanical loads before they occur
3Quantity of substance
If connection terminals are redistributed outwardly, then I/O terminal capacity is improved, but warpage phenomena increase
Solution Approach 1:
The patent modifies the physical parameters of the encapsulant by creating a recess with specific depth and dimensions that accommodate the interconnection member, changing the stress distribution parameters to reduce warpage while maintaining the expanded I/O terminal configuration
Data Source
AI summary
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the encapsulant fills spaces between walls of the through-hole and side surfaces of the semiconductor chip, and at least portions of the encapsulant extend to a space between the first interconnection member and the second interconnection member and a space between the active surface of the semiconductor chip and the second interconnection member.