Fan-Out Packaging Structure With Fewer Reflow Steps and Less Cracking
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Solution Overview
Problem
Fan-out packaging structures for circuit boards require at least three reflow treatments, which can cause deformation and reduce the reliability of the packaging due to the high likelihood of cracking.
Innovation Solution
A method for manufacturing a packaging structure that involves forming conductive posts and receiving grooves on a carrier plate, using an insulating adhesive to secure embedded components, and applying a second carrier plate with reduced reflow soldering processes, thereby minimizing deformation and improving bonding strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fan-out packaging structure uses at least three reflow treatments, then chips can be attached, but circuit board deformation occurs and reliability reduces
Solution Approach 1:
The patent segments the packaging structure into multiple functional layers including carrier plates, insulating layers, conductive posts, and receiving grooves. This segmentation allows each component to perform its specific function independently, reducing the need for multiple reflow treatments and minimizing circuit board deformation while maintaining manufacturing capability.
2Ease of manufacture
If multiple reflow treatments are applied, then chips can be attached, but cracking likelihood increases
Solution Approach 1:
The patent implements preliminary actions by pre-forming conductive posts, receiving grooves, and insulating layers before chip attachment. This preliminary structuring allows for controlled bonding processes that reduce the need for multiple reflow treatments, thereby decreasing cracking risk while maintaining chip attachment capability.
3Ease of manufacture
If conventional fan-out packaging is used, then standard manufacturing process is followed, but bonding strength is insufficient
Solution Approach 1:
The patent employs composite material structures combining carrier plates, insulating layers, conductive posts, and receiving grooves in an integrated packaging structure. This composite approach enhances bonding strength through multiple bonding interfaces and distributed stress paths, improving upon conventional single-material fan-out packaging while remaining manufacturable.
Data Source
AI summary
A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.


