Fan-Out Semiconductor Package With Dual Redistribution Routing
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Solution Overview
Problem
The challenge of adjusting the number of solder balls on semiconductor chips due to international spacing standards limits design flexibility as electronic devices shrink in size.
Innovation Solution
A fan-out semiconductor package design featuring a package body with fan-in and fan-out regions, including redistribution structures and wiring layers to extend connections beyond the standard spacing, allowing for increased chip design freedom and integration capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If international standard spacing for solder balls is used on semiconductor chips, then manufacturing compatibility is improved, but design flexibility deteriorates
Solution Approach 1:
The patent introduces a redistribution structure that extends connections from the chip bottom surface to the package body top surface, adding a vertical dimension to the connection path. This allows solder balls to be positioned at non-standard spacings on the chip while achieving standard间距 at the package level, thus maintaining manufacturing compatibility without sacrificing design flexibility
Solution Approach 2:
The redistribution structure acts as an intermediary between the chip and the package body, decoupling the spacing requirements of the two components. It receives connections from the chip at one spacing and provides connections to the package body at another spacing, allowing each component to operate at its optimal spacing independently
2Volume of moving object
If chip size is decreased to shrink electronic devices, then device compactness is improved, but solder ball arrangement flexibility deteriorates
Solution Approach 1:
By extending connections vertically through the package body using the redistribution structure, the patent effectively increases the available connection area beyond the chip footprint. This allows for more flexible solder ball arrangements even on smaller chips, as connections can be distributed across a larger area in the vertical dimension
3Adaptability or versatility
If fan-out region is added to extend connections, then design freedom is improved, but package complexity deteriorates
Solution Approach 1:
The patent integrates the redistribution structure with the existing package body and chip wiring structures, merging multiple functions into a unified architecture. The fan-out region is combined with the redistribution structure to achieve both connection extension and routing functionality, reducing overall package complexity while maintaining design freedom
Data Source
AI summary
Provided is a fan-out semiconductor package including a package body having a fan-in region and a fan-out region, the fan-out region surrounding the fan-in region and including a body wiring structure; a fan-in chip structure in the fan-in region, the fan-in chip structure comprising a chip and a chip wiring structure on a top surface of the chip; a first redistribution structure on a bottom surface of the package body and a bottom surface of the fan-in chip structure, the first redistribution structure comprising first redistribution elements extending towards the fan-out region; and a second redistribution structure on a top surface of the package body and a top surface of the chip wiring structure, the second redistribution structure comprising second redistribution elements extending towards the fan-out region.