Fan-Out Package Layout for RF Inductor Signal Integrity

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Solution Overview

Problem

The semiconductor industry faces challenges in ensuring the signal performance and reliability of radio frequency integrated circuits (RF-ICs) due to limitations in package design, particularly in maintaining the integrity of inductors within these circuits during the fabrication process.

Innovation Solution

The process involves forming an integrated fan-out package with a wiring-free dielectric portion that encapsulates the inductors, using conductive pillars and a redistribution circuit structure with dummy patterns, which enhances signal performance and reliability by preventing conductive interference and ensuring the integrity of the inductors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional package design is used for RF-ICs, then manufacturing is simpler, but signal performance and reliability deteriorate due to conductive interference affecting inductors

Engineering Contradiction:
Improvesignal performance and reliability of RF-ICsVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The package structure is segmented into distinct functional regions: a wiring-free dielectric portion that completely surrounds each inductor, separating conductive elements into different spatial zones. This segmentation prevents conductive interference by ensuring no conductive pathways exist within the inductor's immediate vicinity, thereby protecting signal integrity while maintaining manufacturing feasibility through modular fabrication processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A wiring-free dielectric material serves as an intermediary barrier between inductors and any conductive elements in the package. This dielectric portion acts as a protective mediator that electrically isolates the inductors from potential interference sources, ensuring signal performance without requiring complex active shielding or filtering circuits

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If inductors are exposed during fabrication, then manufacturing is easier, but signal integrity deteriorates due to conductive interference

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidinductor signal integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The wiring-free dielectric portion is formed around inductors during the fabrication process before final packaging, preliminarily establishing protective isolation. This preliminary action ensures inductor integrity is maintained throughout subsequent manufacturing steps, allowing standard fabrication processes to proceed without requiring special handling or protection measures for the inductors

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If conductive elements are placed close to inductors, then area is reduced, but signal performance deteriorates due to interference

Engineering Contradiction:
Improvepackage areaVSAvoidsignal performance (Q-factor)
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The package structure implements local quality by creating a wiring-free zone specifically around each inductor, while allowing conductive elements to be positioned in other areas of the package. This localized approach to conductive isolation protects inductor signal performance (Q-factor) without unnecessarily restricting the placement of other conductive elements, thereby optimizing area utilization while maintaining signal integrity

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11901303B2Integrated fan-out package
Publication Date: 2024.02.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11901303B2 patent drawing
  • US11901303B2 patent drawing
  • US11901303B2 patent drawing

AI summary

An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an antenna region. The insulating encapsulation encapsulates the integrated circuit. The redistribution circuit structure is disposed on the integrated circuit and the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit, and the redistribution circuit structure includes a redistribution region and a dummy region including a plurality of dummy patterns embedded therein, wherein the antenna region includes an inductor and a wiring-free dielectric portion, and the wiring-free dielectric portion of the antenna region is between the inductor and the dummy region.