Wafer-Level Fan-Out Sealing Structure for Warpage and Solder Ball Stability

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Solution Overview

Problem

Conventional wafer level fan out semiconductor devices experience warpage and solder ball detachment due to thermal expansion and shrinkage, which affects their reliability and functionality.

Innovation Solution

The implementation of a wafer level fan out semiconductor device design where the first and second sealing parts have the same thermal expansion coefficient, minimizing warpage, and the solder balls are fixed and locked by the second sealing part to the redistribution layers, preventing detachment, while the second surface of the semiconductor die is exposed for enhanced heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional wafer level fan out semiconductor device structure is used, then manufacturing is simplified, but warpage occurs due to thermal expansion mismatch

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidstructural stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent changes the thermal expansion coefficient parameter of the sealing part to match that of the semiconductor die. By selecting a sealing part material with a thermal expansion coefficient within 10 ppm/°C of the semiconductor die, the invention resolves the warpage issue caused by thermal expansion mismatch while maintaining the simplified wafer-level manufacturing process

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If conventional sealing structure is used, then device assembly is simplified, but solder balls detach during thermal expansion or shrinkage

Engineering Contradiction:
Improvestructure complexityVSAvoidsolder ball attachment reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent modifies the mechanical parameter of the sealing part by selecting materials with matched thermal expansion coefficients. This parameter change ensures that the sealing part and semiconductor die expand and contract together during temperature cycles, preventing relative movement that would cause solder ball detachment while maintaining structural simplicity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention uses composite material selection where the sealing part is chosen from materials specifically matched to the semiconductor die's thermal expansion characteristics. This material matching creates a composite structure that moves uniformly under thermal stress, securing the solder balls without requiring additional complex anchoring mechanisms

Inventive Principle:
Principle #40Composite materials

3Temperature

If second surface of semiconductor die is exposed, then heat dissipation is enhanced, but device protection is reduced

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidenvironmental exposure
Core Design Contradiction:
TemperatureVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selectively exposing only the second surface of the semiconductor die for heat dissipation while keeping other surfaces protected. The sealing part provides localized protection on the exposed surface, allowing thermal management needs to be met without fully enclosing the device, thus balancing heat dissipation with environmental protection

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively minimizes warpage and suppresses solder ball detachment, ensuring the reliability and performance of the semiconductor device by matching thermal expansion coefficients and securing solder balls, thereby enhancing heat dissipation efficiency.

Implementation Method 1

the first and second sealing parts have the same thermal expansion coefficient, minimizing warpage

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

solder balls may be easily detached during thermal expansion or shrinkage

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 3

the second surface of the semiconductor die is exposed for enhanced heat dissipation

Methodology Applied
Scientific EffectHeat dissipation: Convection

Data Source

PatentUS11855023B2Wafer level fan out semiconductor device and manufacturing method thereof
Publication Date: 2023.12.26 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US11855023B2 patent drawing
  • US11855023B2 patent drawing
  • US11855023B2 patent drawing

AI summary

A wafer level fan out semiconductor device and a manufacturing method thereof are provided. A first sealing part is formed on lateral surfaces of a semiconductor die. A plurality of redistribution layers are formed on surfaces of the semiconductor die and the first sealing part, and solder balls are attached to the redistribution layers. The solder balls are arrayed on the semiconductor die and the first sealing part. In addition, a second sealing part is formed on the semiconductor die, the first sealing part and lower portions of the solder balls. The solder balls are exposed to the outside through the second sealing part. Since the first sealing part and the second sealing part are formed of materials having thermal expansion coefficients which are the same as or similar to each other, warpage occurring to the wafer level fan out semiconductor device can be suppressed.