Integrated Fan-Out Package Segmented Metal Lines
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Solution Overview
Problem
Integrated fan-out packages face challenges in reducing metal density and costs while maintaining reliability, particularly in achieving compactness and efficient integration of electronic components.
Innovation Solution
A semiconductor device design featuring a substrate with embedded electronic components, a conductive structure with alternating power and ground lines, a passivation layer with patterned openings, and an under bump metallization layer to form bumps that penetrate through the passivation layer and connect to the conductive structure, reducing metal density and improving reliability by dividing conventional wide metal blocks into multiple segments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wide metal blocks are used in integrated fan-out packages, then metal density is high and manufacturing is simpler, but Equivalent Serial Resistance (ESR) and Equivalent Serial Inductance (ESL) increase reducing reliability
Solution Approach 1:
The patent divides conventional wide metal blocks into multiple segmented metal lines with alternating power and ground arrangements. This segmentation reduces ESR and ESL by creating multiple current paths and improving current distribution, while the segmented structure maintains manufacturing feasibility through standardized patterning processes.
2Area of stationary object
If integrated fan-out packages use compact designs, then package area is reduced, but metal density management becomes more challenging
Solution Approach 1:
The patent implements alternating power and ground metal lines with specific local arrangements optimized for different regions of the package. This local quality approach allows compact packaging by efficiently utilizing space with targeted metal density management in specific areas, achieving both compactness and controlled metal distribution.
3Adaptability or versatility
If multiple electronic components are integrated in the substrate, then functionality is enhanced, but manufacturing complexity and cost increase
Solution Approach 1:
The patent creates a universal substrate structure with embedded electronic components and a standardized alternating metal line pattern that can accommodate multiple different electronic components. This multi-functional design enables enhanced functionality through component integration while maintaining manufacturing simplicity through standardized processes and modular architecture.
Data Source
AI summary
A semiconductor device, an integrated fan-out package and a method of forming the same are disclosed. In some embodiments, a semiconductor device includes a substrate, a conductive layer, a passivation layer and a bump structure. The substrate has at least one electronic component therein. The conductive layer has a plurality of lines patterns over and electrically connected to the at least one electronic component. The passivation layer is over the conductive layer. The bump structure has a plurality of protruding parts penetrating through the passivation layer and electrically connected to the lines patterns of the conductive layer.