Fan-Out Semiconductor Device Vertical Stacking
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Solution Overview
Problem
The existing chip-on-board (COB) technology faces limitations in miniaturization and noise reduction due to the significant signal path between semiconductor chips and passive components, which hinders the miniaturization of mobile devices and increases noise interference.
Innovation Solution
A fan-out semiconductor device is proposed, where a fan-out semiconductor package with a semiconductor chip and a fan-out component package with a passive component are stacked vertically, with redistribution layers connecting them to minimize the signal path and allow for a more compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If chip-on-board (COB) mounting technology is used to mount semiconductor chips and passive components on a PCB, then the device can be assembled with conventional techniques, but the interval between components cannot be sufficiently reduced, limiting miniaturization
Solution Approach 1:
The patent transitions from planar COB mounting to three-dimensional stacked packaging. The semiconductor chip and passive component are arranged in different vertical layers and connected through vertical signal paths, enabling miniaturization by utilizing the Z-dimension rather than being constrained to two-dimensional PCB layout.
Solution Approach 2:
The patent implements a nested structure where the passive component is positioned within the vertical projection area of the semiconductor chip. The component packages are stacked such that the lower package contains the passive component while the upper package contains the semiconductor chip, with connection terminals extending through the structure to enable vertical interconnection.
2Object-affected harmful factors
If COB mounting is used, then assembly is straightforward, but the signal path between semiconductor chip and passive component becomes significant, increasing noise interference
Solution Approach 1:
The signal path transitions from horizontal traversal across the PCB to vertical transmission through stacked packages. This dimensional change significantly shortens the signal path length between the semiconductor chip and passive component, reducing electromagnetic interference and noise while improving signal integrity.
3Adaptability or versatility
If conventional COB technology is used, then the packaging process is simple, but spatial limitations restrict the utilization of multiple I/O pads
Solution Approach 1:
The patent utilizes vertical stacking to create multiple connection interfaces at different height levels. The first and second connection members provide separate connection terminals that can be independently configured, allowing multiple I/O pads to be utilized without requiring additional horizontal PCB space, thereby overcoming spatial limitations.
Data Source
AI summary
There is provided a fan-out semiconductor device in which a first package having a semiconductor chip disposed therein and having a fan-out form and a second package having a passive component disposed therein and having a fan-out form are stacked in a vertical direction so that the semiconductor chip and the passive component are electrically connected to each other by a path as short as possible.