Fan-Out Semiconductor Package With Through-Via Interconnects
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Solution Overview
Problem
Current semiconductor package assemblies face challenges in achieving high routing density and effective heat dissipation, particularly in high-end smartphone applications, where improved thermal management and finer pitch routings are necessary to enhance electrical performance.
Innovation Solution
A semiconductor package assembly is designed with a fan-out package and a memory package stacked together, utilizing a redistribution layer (RDL) structure and through via interconnects to provide finer metal routings and improved thermal dissipation, while maintaining a thinner profile and reducing thermal expansion mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional package-on-package assembly is used, then component density is improved, but thermal dissipation capability deteriorates
Solution Approach 1:
The patent introduces a lateral heat dissipation dimension by extending heat dissipation structures (heat dissipation fins, heat dissipation layers) from the vertical stack to the horizontal plane. This allows heat to dissipate in multiple directions (both vertically through the stack and laterally through the extended structures), effectively solving the thermal accumulation problem in high-density vertical packaging without sacrificing component density.
2Manufacturing precision
If finer pitch routings are implemented, then electrical performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the routing function into multiple segments: through-via interconnects for vertical connections, redistribution layer structures for lateral routing, and heat dissipation structures with integrated routing capabilities. This segmentation allows each component to be optimized independently, achieving fine-pitch routing performance while managing manufacturing complexity through modular fabrication processes.
Solution Approach 2:
The heat dissipation structures serve multiple functions simultaneously: they provide thermal management, act as electrical interconnects (through-via interconnects), and serve as redistribution layers for signal routing. This multi-functionality reduces the number of separate manufacturing steps needed, thereby reducing overall manufacturing complexity while achieving fine-pitch routing capability.
3Quantity of substance
If vertical stacking is used, then component density is improved, but thermal resistance increases
Solution Approach 1:
The patent extends heat dissipation structures laterally from the vertical stack to create additional heat dissipation pathways in the horizontal dimension. This dimensional extension reduces thermal resistance by providing parallel heat flow paths, allowing heat to escape more efficiently without compromising the vertical stacking density that achieves high component density.
Data Source
AI summary
A semiconductor package assembly is provided. The semiconductor package assembly includes a fan-out package and a memory package stacked on the fan-out package. The fan-out package includes a first redistribution layer (RDL) structure, a first logic die, through via (TV) interconnects, and first conductive structures. The first logic die and the first conductive structures are in contact with the first RDL structure. The TV interconnects are electrically connected to the first RDL structure. The memory package includes a first substrate, a memory die, and second conductive structures. The memory die and the second conductive structures are disposed on the first substrate. The memory die is electrically connected to the first logic die using the TV interconnects and the first RDL structure. The semiconductor package assembly further includes a second substrate electrically connected to the first logic die using the first conductive structures.