Fan-Out Sub-Package Stack for High I/O Semiconductor Interconnects
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Solution Overview
Problem
High-performance semiconductor packages require advanced techniques to increase the number of input/output (I/O) terminals for efficient data processing, as traditional methods struggle to effectively connect multiple semiconductor dies to a package substrate, leading to limitations in operation speed and signal integrity.
Innovation Solution
A stack package design incorporating a fan-out sub-package with first and second connection bumps, bonding wires, and redistributed line patterns, which allows for the stacking of semiconductor dies and provides multiple channels for communication, thereby increasing the number of I/O terminals and improving signal routing length consistency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of I/O terminals is increased to process more data at high speed, then data processing capability is improved, but the complexity of electrically connecting semiconductor dies to package substrate increases
Solution Approach 1:
The package substrate is divided into multiple connection regions with separate wire bond fingers and bump bond fingers. Wire bonding is used for some connections while bump bonding is used for others, segmenting the connection methods to handle different signal types and reduce overall complexity
Solution Approach 2:
The patent transitions from planar connections to three-dimensional stacked connections by vertically stacking semiconductor dies on the package substrate. This adds a vertical dimension to the connection architecture, allowing multiple I/O terminals to be accessed through layered stacking rather than expanding only in the planar direction
2Speed
If multiple semiconductor dies are stacked on package substrate using wire bonding, then operation speed is improved, but signal integrity deteriorates due to limited connection channels
Solution Approach 1:
The patent combines wire bonding and bump bonding techniques into a hybrid connection system. Wire bonds provide flexible routing for certain signals while bump bonds provide direct, low-inductance connections for others, merging the advantages of both methods to maintain signal integrity while supporting high-speed operation
Solution Approach 2:
The package substrate acts as an intermediary between the semiconductor dies and the external environment. It provides multiple connection points including wire bond fingers and bump bond fingers that mediate signal transmission, allowing optimized signal paths and reducing degradation through the use of appropriate connection types for different signal requirements
3Productivity
If the number of I/O terminals is increased to enhance data processing, then productivity is improved, but the difficulty of electrically connecting dies to substrate increases
Solution Approach 1:
The connection architecture is segmented into multiple independent connection systems: wire bond connections to wire bond fingers, bump bond connections to bump bond fingers, and inter-die connections. This segmentation allows each connection type to be optimized and manufactured separately, reducing the overall difficulty despite the increased number of I/O terminals
Solution Approach 2:
The package substrate serves multiple functions simultaneously: it provides mechanical support for stacked dies, offers electrical connection through multiple finger types, enables signal routing, and facilitates thermal management. This multi-functionality consolidates several requirements into a single component, simplifying the overall manufacturing process despite the complexity of connections
Data Source
AI summary
A stack package includes a package substrate and a fan-out sub-package mounted on the package substrate using first and second connection bumps. The fan-out sub-package includes a first semiconductor die and redistributed line (RDL) patterns. Second semiconductor dies are stacked on the package substrate to provide a first step structure, and third semiconductor dies are stacked on the second semiconductor dies to provide a second step structure. The second and third semiconductor dies are connected to the package substrate by bonding wires.